參數(shù)資料
型號(hào): MCIMX258CJM4A
廠商: Freescale Semiconductor
文件頁數(shù): 135/153頁
文件大小: 0K
描述: IC MPU IMX25 IND 400MAPBGA
標(biāo)準(zhǔn)包裝: 90
系列: i.MX25
核心處理器: ARM9
芯體尺寸: 32-位
速度: 400MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 128
程序存儲(chǔ)器類型: 外部程序存儲(chǔ)器
RAM 容量: 144K x 8
電壓 - 電源 (Vcc/Vdd): 1.15 V ~ 1.52 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
82
Freescale Semiconductor
65
SCKR rising edge to FSR out (bl) high
17.0
7.0
x ck
i ck a
ns
66
SCKR rising edge to FSR out (bl) low
17.0
7.0
x ck
i ck a
ns
67
SCKR rising edge to FSR out (wr) high5
——
19.0
9.0
x ck
i ck a
ns
68
SCKR rising edge to FSR out (wr) low5
——
19.0
9.0
x ck
i ck a
ns
69
SCKR rising edge to FSR out (wl) high
16.0
6.0
x ck
i ck a
ns
70
SCKR rising edge to FSR out (wl) low
17.0
7.0
x ck
i ck a
ns
71
Data in setup time before SCKR (SCK in
synchronous mode) falling edge
——
12.0
19.0
x ck
i ck
ns
72
Data in hold time after SCKR falling edge
3.5
9.0
x ck
i ck
ns
73
FSR input (bl, wr) high before SCKR falling
edge5
——
2.0
12.0
x ck
i ck a
ns
74
FSR input (wl) high before SCKR falling edge
2.0
12.0
x ck
i ck a
ns
75
FSR input hold time after SCKR falling edge
2.5
8.5
x ck
i ck a
ns
76
Flags input setup before SCKR falling edge
0.0
19.0
x ck
i ck s
ns
77
Flags input hold time after SCKR falling edge
6.0
0.0
x ck
i ck s
ns
78
SCKT rising edge to FST out (bl) high
18.0
8.0
x ck
i ck
ns
79
SCKT rising edge to FST out (bl) low
20.0
10.0
x ck
i ck
ns
80
SCKT rising edge to FST out (wr) high5
——
20.0
10.0
x ck
i ck
ns
81
SCKT rising edge to FST out (wr) low5
——
22.0
12.0
x ck
i ck
ns
82
SCKT rising edge to FST out (wl) high
19.0
9.0
x ck
i ck
ns
83
SCKT rising edge to FST out (wl) low
20.0
10.0
x ck
i ck
ns
84
SCKT rising edge to data out enable from
high impedance
——
22.0
17.0
x ck
i ck
ns
85
SCKT rising edge to transmitter #0 drive
enable assertion
——
17.0
11.0
x ck
i ck
ns
Table 60. ESAI General Timing Requirements (continued)
No.
Characteristics1 2
Symbol
Expression3
Min.
Max.
Condition
Unit
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