參數(shù)資料
型號: MCIMX258CJM4A
廠商: Freescale Semiconductor
文件頁數(shù): 62/153頁
文件大?。?/td> 0K
描述: IC MPU IMX25 IND 400MAPBGA
標(biāo)準(zhǔn)包裝: 90
系列: i.MX25
核心處理器: ARM9
芯體尺寸: 32-位
速度: 400MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 128
程序存儲器類型: 外部程序存儲器
RAM 容量: 144K x 8
電壓 - 電源 (Vcc/Vdd): 1.15 V ~ 1.52 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
16
Freescale Semiconductor
3.2
Supply Power-Up/Power-Down Requirements and Restrictions
Any i.MX25 board design must comply with the power-up and power-down sequence guidelines given in
this section to ensure reliable operation of the device. Recommended power-up and power-down
sequences are given in the following subsections.
CAUTION
Deviations from the guidelines in this section may result in the following
situations:
Excessive current during power-up phase
Prevention of the device from booting
Irreversible damage to the i.MX25 (worst-case scenario)
NOTE
For security applications, the coin battery must be connected during both
power-up and power-down sequences to ensure that security keys are not
unintentionally erased.
3.2.1
Power-Up Sequence
For those users that are not using DryIce/SRTC, the following power-up sequence is recommended:
1. Assert power on reset (POR).
2. Turn on QVDD digital logic domain supplies.
3. Turn on NVCCx digital I/O power supplies after QVDD is stable.
4. Turn on all other analog power supplies, including USBPHY1_VDDA_BIAS,
USBPHY1_UPLL_VDD, USBPHY1_VDDA, USBPHY2_VDD, OSC24M_VDD,
MPPLL_VDD, UPLL_VDD, NVCC_ADC, and FUSEVDD (FUSEVDD is tied to GND if fuses
are not programmed), after all NVCCx digital I/O supplies are stable.
5. Negate the POR signal.
Table 14. iMX25 Reduced Power Mode Current Consumption
Power Group
Power Supply
Voltage Setting
Typical Current Consumption
BAT_VDD
1.15 V
9.95
μA
1.55 V
12.6
μA
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