i.MX27 and i.MX27L Data Sheet, Rev. 1.8
78
Freescale Semiconductor
Electrical Characteristics
Figure 40. SDRAM Self-Refresh Cycle Timing Diagram
NOTE
The clock continues to run unless both CKEs are low. Then the clock is
stopped in low state.
Table 40. SDRAM Self-Refresh Cycle Timing Parameters
ID
Parameter
Symbol
Min
Max
Unit
SD16
CKE output delay time
tCKS
1.8
—
ns
SDCLK
CS
CAS
RAS
ADDR
BA
WE
CKE
Don’t care
SD16
