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| 型號： | MCM20027 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Color SXGA Digital Image Sensor 1280 x 1024 pixel progressive scan solid state image sensor with integrated CDS/PGA/ADC, digital programming, control |
| 中文描述： | 彩色SXGA數字圖像傳感器1280 × 1024像素逐行掃描固態(tài)集成信用違約掉圖像傳感器/美國PGA /模數轉換器，數字節(jié)目，控制 |
| 文件頁數： | 54/74頁 |
| 文件大小： | 973K |
| 代理商： | MCM20027 |
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MOTOROLA, INC. 2001
Revision 8.0 - 28 November 2001 : MCM20027
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
54
ImageMOS
13.4.3 Integration Time Control
The Integration Time registers;
Table 41
,
Table 40
, and
Table 41
, control the integration time for the pixel array.
Integration time for CFRS and SFRS;
cint
[13:0], is
measured in Virtual Row times. Please refer to
Figure
11
for a pictorial description of the Virtual Frame and its
relationship to the WOI.
NOTE!!
The
upd bit
of the
Integration Time MSB Reg-
ister; Table 40
is used to indicate a change to
cint
[13:0].
Since multiple I2C writes may be needed to complete
desired frame to frame integration time changes, the
upd
bit signals that all desired programming has been
completed, and to apply these changes to the next
frame captured. This prevents undesirable changes in
integration time that may result from I2C writes that
span the “End of Frame” boundary. This
upd
bit has to
be toggled from its previous state in order for the new
value of
cint
[13:0] to be accepted/updated by the sen-
sor and take effect. i.e. If its previous state is “0”, when
writing a new
cint
value, first write cint[7:0] to the
Inte-
gration Time LSB Register; Table 41
, then write both
cint
[13:8] and “1” to the
upd
bit to the
Integration Time
MSB Register; Table 40
.
A virtual frame is the mechanism by which the user con-
trols the integration time and frame time for the output
data stream. By adding additional rows or columns as
‘blanking’ to the WOI to form the Virtual Frame, the user
can control the amount of blanking in both horizontal
and vertical space.(
Table 42, “Virtual Frame Row Depth
MSB Register,” on page 55
Table 43, “Virtual Frame
Row Depth LSB Register,” on page 55Table 44, “Virtual
Frame Column Width MSB Register,” on
page 56Table 45, “Virtual Frame Column Width LSB
Register,” on page 56
)
The user should be careful to create a Virtual Frame
that is larger than the WOI. There is no logic in the sen-
sor interface to prevent the user from defining a Virtual
Frame smaller than the WOI. Therefore, pixel data may
be lost.
The Virtual Frame must be at least 1 row and 6 columns
larger than the WOI.
The Virtual Frame completely defines the integration
time in CFRS. Any changes to the WOI or how the WOI
is sampled has no effect on integration time.
Address
4E
h
Integration Time MSB
Default
04
h
msb (7)
6
5
4
3
2
1
lsb (0)
FUO
upd
cint[13]
cint[12]
cint[11]
cint[10]
cint[9]
cint[8]
Bit
Number
Function
Description
Reset
State
7
FUO
Factory Use Only
6
Integration
Time
Update
Switch
This bit has to change from its previous state everytime a new value
is written to
Integration Time ISB and the Integration Time LSB
.
0
5 - 0
Integration
Time
In conjunction with the Integration Time LSB (
Table 41
) Register,
forms the 14-bit Integration Time cint[13:0].
000100
b
Table 40. Integration Time MSB Register
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