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| 型號： | MCM20027 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Color SXGA Digital Image Sensor 1280 x 1024 pixel progressive scan solid state image sensor with integrated CDS/PGA/ADC, digital programming, control |
| 中文描述： | 彩色SXGA數(shù)字圖像傳感器1280 × 1024像素逐行掃描固態(tài)集成信用違約掉圖像傳感器/美國PGA /模數(shù)轉(zhuǎn)換器，數(shù)字節(jié)目，控制 |
| 文件頁數(shù)： | 57/74頁 |
| 文件大?。?/td> | 973K |
| 代理商： | MCM20027 |
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MOTOROLA, INC. 2001
Revision 8.0 - 28 November 2001 : MCM20027
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
57
ImageMOS
The
SOF Delay Register; Table 46
and
VCLK Delay
Register; Table 47
are used to determine the time
(clock) delay for the start of the two signals respectively.
The SOF Delay is measured as the time after the start
of the change of row address (Change of row address
is a parameter that cannot be easily identified by the
common user). The VCLK Delay is defined as the time
after the SOF signal is first initialized. The
SOF & VCLK
Signal Length Control Register
,
Table 48
, is used to de-
fine the size of the SOF and VCLK signals. In default,
SOF is one row wide while VLCK is 64 MCLKs wide
Address
54
h
SOF Delay
Default
4C
h
msb (7)
6
5
4
3
2
1
lsb (0)
sofd[7]
sofd[6]
sof[d5]
sofd[4]
sofd[3]
sofd[2]
sofd[1]
sofd[0]
Bit
Number
Function
Description
Reset
State
7 - 0
SOF Delay
Delay= sofd[d] x 0.5 MCLKs
(Note - Delay is relative to Internal Pixel Transfer Control)
1001100b
Table 46. SOF Delay Register
Address
55
h
VCLK Delay
Default
02
h
msb (7)
6
5
4
3
2
1
lsb (0)
vckd[7]
vckd[6]
vckd[5]
vckd[4]
vckd[3]
vckd[2]
vckd[1]
vckd[0]
Bit
Number
Function
Description
Reset
State
7 - 0
VCLK
Delay
Delay = vckd[d] x 0.5 MCLKs
(Note - Delay is relative to Start Of Frame {SOF} signal)
00000010
b
Table 47. VCLK Delay Register
Address
56
h
SOF and VCLK Signal Length Control
Default
E
h
msb (7)
6
5
4
3
2
1
lsb (0)
x
x
x
x
sofc[3]
sofc[2]
vckc[1]
vckc[0]
Bit
Number
Function
Description
Reset
State
3 - 2
SOF Con-
trol
sof[3:2] = 00
b
= 1 MCLK Wide
sof[3:2] = 01
b
= 8 MCLKs Wide
sof[3:2] = 10
b
= 64 MCLKs Wide
sof[3:2] = 11
b
= Full Row Wide
11
b
Table 48. SOF & VCLK Signal Length Control Register
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