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參數(shù)資料
| 型號(hào)： | MCM20027 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Color SXGA Digital Image Sensor 1280 x 1024 pixel progressive scan solid state image sensor with integrated CDS/PGA/ADC, digital programming, control |
| 中文描述： | 彩色SXGA數(shù)字圖像傳感器1280 × 1024像素逐行掃描固態(tài)集成信用違約掉圖像傳感器/美國(guó)PGA /模數(shù)轉(zhuǎn)換器，數(shù)字節(jié)目，控制 |
| 文件頁數(shù)： | 59/74頁 |
| 文件大?。?/td> | 973K |
| 代理商： | MCM20027 |
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MOTOROLA, INC. 2001
Revision 8.0 - 28 November 2001 : MCM20027
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
59
ImageMOS
The
Internal Timing Control Register 1 (shs time definition); Table 50
and ,
Internal Timing Control Register 2 (shr
time definition); Table 51
are used to define the size of internal timing pulse widths. In default, both
shs
and
shr
are
6 MCLK’s wide. A maximum of 64 MCLK‘s can be programmed for the shs delay and another 64 MCLK‘s for the shr
delay, for a total 0f 128 MCLK‘s. Note! writing 00h to either of these Registers will write a maximum timing delay of
64 MCLK‘s. i.e. 00 = 64 MCLK
1
Row Read-
out
1
b
= Reverse Readout (Top to Bottom)
0
b
= Normal Readout (Bottom to Top)
0
b
0
Column
Readout
1
b
= Reverse Readout (Right to Left)
0
b
= Normal Readout (Left to Right
0
b
Address
5F
h
Internal Timing Control
Default
0A
h
msb (7)
6
5
4
3
2
1
lsb (0)
x
x
shs[5]
shs[4]
shs[3]
shs[2]
shs[1]
shs[0]
Bit
Number
Function
Description
Reset
State
7-6
Unused
Unused
xx
5 - 0
shs
shs[5:0] = 000000
b
= 64 MCLKs Wide
shs[5:0] = 000001
b
= 1
d
MCLKs Wide
shs[5:0] = 000010
b
= 2
d
MCLKs Wide
shs[5:0] = 000011
b
= 3
d
MCLKs Wide
|
|
shs[5:0] = 111111
b
= 63
d
MCLKs Wide
001010b
Table 50. Internal Timing Control Register 1 (shs time definition)
Address
57
h
Greycode and Readout Control
Default
04
h
msb (7)
6
5
4
3
2
1
lsb (0)
x
x
x
x
gcr
gcc
rrr
rrc
Table 49. Greycode and Readout Control Register
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