參數資料
型號: MCM67M618BFN9
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 64K x 18 Bit BurstRAM Synchronous Fast Static RAM
中文描述: 64K X 18 CACHE SRAM, 9 ns, PQCC52
封裝: PLASTIC, LCC-52
文件頁數: 4/12頁
文件大?。?/td> 166K
代理商: MCM67M618BFN9
MCM67M618B
4
MOTOROLA FAST SRAM
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
5%, TA = 0 to + 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
(Voltages Referenced to VSS = 0 V)
Parameter
Symbol
Min
Max
Unit
Supply Voltage (Operating Voltage Range)
VCC
VIH
VIL
4.75
5.25
V
Input High Voltage
2.2
VCC + 0.3**
0.8
V
Input Low Voltage
– 0.5*
V
*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width
20.0 ns) for I
20.0 mA.
**VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width
20.0 ns) for I
20.0 mA.
DC CHARACTERISTICS AND SUPPLY CURRENTS
Parameter
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (G = VIH)
AC Supply Current (Device Selected, All Outputs Open,
Freq = Max)
Ilkg(I)
Ilkg(O)
ICCA
±
1.0
μ
A
±
1.0
μ
A
MCM67M618B–9
MCM67M618B–10
MCM67M618B–12
TBD
mA
CMOS Standby Supply Current (Device Deselected, Freq = 0, VCC = Max,
All Inputs Static at CMOS Levels Vin
VSS + 0.2 V or
VCC – 0.2 V)
ISB2
TBD
mA
Clock Running (Device Deselected, Freq = Max, VCC = Max,
All Inputs Toggling at CMOS Levels Vin
VSS + 0.2 V or
VCC – 0.2 V)
ISB4
TBD
mA
Output Low Voltage (IOL = + 8.0 mA)
Output High Voltage (IOH = – 4.0 mA)
NOTE: Good decoupling of the local power supply should always be used. DC characteristics are guaranteed for all possible 68040 and PowerPC
bus cycles.
VOL
VOH
0.4
V
2.4
3.3
V
CAPACITANCE
(f = 1.0 MHz, dV = 3.0 V, TA = 25
°
C, Periodically Sampled Rather Than 100% Tested)
Parameter
Symbol
Min
Typ
Max
Unit
Input Capacitance
Cin
CI/O
4
5
pF
Input/Output Capacitance
6
8
pF
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