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參數(shù)資料
| 型號(hào)： | MCP18480 |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | -48V Hot Swap Controller |
| 中文描述： | - 48V熱插拔控制器 |
| 文件頁數(shù)： | 37/64頁 |
| 文件大?。?/td> | 871K |
| 代理商： | MCP18480 |
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2003 Microchip Technology Inc.
DS20091B-page 37
MCP18480
OVO
17
I
A
Overvoltage detect.
Typically for normal operation. This pin is tied to V
NEG
.
This feature allows the overvoltage detection input to monitor an over-
voltage condition across the power module. The voltage is sensed at
the drain of the external MOSFET. The voltage across the load is inter-
nally determined based upon:
The voltage difference between system ground and the voltage
on the V
NEG
pin
The voltage difference between the drain of the external FET and
the voltage on the V
NEG
pin
An external resistor divider network (R
OVO1
and R
OVO2
) is attached
between the drain of the external MOSFET and the V
NEG
pin (R
OVO1
is connected between the drain of the external MOSFET and the OVO
pin, while R
OVO2
is connected between the OVO pin and the V
NEG
pin).
When the voltage across the external MOSFET (source-to-drain)
equals system ground voltage (- V
NEG
+), the maximum desired load
voltage, the GATE pin is forced to the voltage on the V
NEG
pin
(disabling the external MOSFET).
To detect Overvoltage on the board (instead of the load) directly,
connect the OVO pin to the V
NEG
pin.
Power Good indicator.
PWRGOOD
18
O
D
This state of the output is determined by four conditions. These are:
Undervoltage
Overvoltage
Current Limit
External FET is fully-enhanced (from DRAIN
TH
pin on power-up)
PWRGOOD is a CMOS logic voltage (V
NEG
or V
NEG
+12V).
PWRGOOD is active when the device has completed power-up and
the system is neither in an Undervoltage or Overvoltage condition.
Connecting the R
ISET
pin to the V
NEG
pin configures the PWRGOOD
pin to be active high. Connecting the R
ISET
pin to the V
REF
pin config-
ures the PWRGOOD pin to be active low.
Enable Gate driver.
ENABLE
19
I
TTL
Used to enable the GATE pin and assert the PWRGOOD pin. The
ENABLE pin is active-high and is internally pulled up to 5V. This pin is
pulled low by the user to clear the current limit latch when a current-
limit fault occurs with RESTART high, or to disable the GATE pin.
H = Enable the GATE and PWRGOOD pins.
L = Disables the GATE pin, deasserts the PWRGOOD pin and clears
current limit latch.
When the ENABLE pin is high, fault conditions will disable the GATE
pin and deasserts the PWRGOOD pin.
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS-compatible input
D = Digital
TABLE 3-1:
MCP18480 PIN DESCRIPTIONS (CONTINUED)
Pin Name
Pin
Number
Pin
Direction
Buffer
Type
Description
SSOP
Legend: TTL = TTL compatible input
I = Input
P = Power
A = Analog
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| MCP18480-I/SS | 功能描述:熱插拔功率分布 48V Hot Swap RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| MCP18480T-I/SS | 功能描述:熱插拔功率分布 48V Hot Swap RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| MCP-18H | 制造商:Taiyo Electric Ind. 功能描述: |
| MCP-18-I9-LL | 制造商:YAMAICHI 制造商全稱:Yamaichi Electronics Co., Ltd. 功能描述:MatchCon |
| MCP-18-TI9-LL | 制造商:YAMAICHI 制造商全稱:Yamaichi Electronics Co., Ltd. 功能描述:MatchCon |
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