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| 型號： | MCP25055-I/P |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 36/66頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER CAN 8B 14DIP |
| 標準包裝： | 30 |
| 接口： | 1 線，CAN |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 無 |
| 頻率 - 時鐘： | 4MHz |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 14-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 14-PDIP |
| 包裝： | 管件 |
| 包括： | ADC，存儲器，PWM |
| 產品目錄頁面： | 685 (CN2011-ZH PDF) |
| 配用： | DV250501-ND - KIT DEV CAN MCP250XX |
| 其它名稱： | MCP25055I/P |
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2007 Microchip Technology Inc.
DS21664D-page 41
MCP2502X/5X
7.0
ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
7.1
Description
The Analog-to-Digital (A/D) module is a four-channel,
10-bit successive approximation type of A/D. The A/D
allows conversion of an analog input signal to a
corresponding 10-bit number. The four channels are
multiplexed on the GP[3:0] pins. The converter is
turned off/on via the ADCON0 register and each
channel is individually enabled via the ADCON1 control
register. The VREF+ and VREF- sources are user-
selectable as internal or external. Each channel can be
set to one of two conversion modes:
1.
Auto-conversion
2.
Convert-on-request.
7.2
A/D Module Registers
The A/D module itself has several registers. The
registers are:
A/D Control Register 0 (ADCON0)
A/D Control Register 1 (ADCON1)
Transmit-on-Change Register (IOINTEN)
Compare and Polarity Register (ADCMPnL)
A/D Result Registers (ADRESnL, ADRESnH)
The ADCON0 register controls the operation of the
A/D module, including auto-conversion rate and enable
bit. The ADCON1 register enables the A/D function on
port pins GP3:GP0, A/D conversion rate and selects
the voltage reference source. The IOINTEN register’s
four least significant bits enable/disable the transmit-
on-change function. The ADCMPnL.ADPOL bit sets
the polarity (above or below threshold) for the transmit-
on-change function.
The result of an A/D conversion is made available to
the user within the data field of the Read A/D Registers
output message via the CAN bus. This message can
be directly requested by another CAN node or be
automatically transmitted (TXIDO), as has been
described previously.
Additionally, the individual channel results may be read
using the “Read Register” command as described in
as shown in Table 3-2 by addressing the appropriate
A/D result register (ADRESnL and ADRESnH).
7.3
A/D Conversion Modes
There are two modes of conversion that can be
individually selected for each analog channel that has
been
enabled.
These
are
auto-conversion
and
conversion-on-request.
7.3.1
AUTO-CONVERSION MODE
If the Auto-conversion mode is selected (STCON), an
A/D conversion is performed sequentially for each
channel that has been set to Analog Input mode and
has been configured for Auto-conversion mode.
Conversion starts with AN0 and is immediately
followed by AN1, etc. Once the conversion has
completed, the value is stored in the analog channel
registers for the respective channel.
The rate of the auto-conversion is determined by a
timer and prescaler. The formula for determining
conversion rates is:
Typical conversion rates with a 20 MHz oscillator input
are shown in Table 7-1.
TABLE 7-1:
AUTO-CONVERSION RATES
FOR GIVEN PRESCALE
RATES AT 20 MHZ
The timer is turned on if one of the GPnTXC bits are set
in the IOINTEN register and configured as analog
input.
The prescaler counter is cleared when the device is
reset (RST reset or Power-on reset).
Note:
The GPDDR register controls the direction
of the GPIO pins, even when they are
being used as analog inputs. The user
must ensure that the bits in the GPDDR
register are maintained set (input) when
using them as analog inputs.
TOPS[2:0]
Prescale
Rate
Auto-Conversion
Rate
000
1:1
51 s
001
1:8
410 s
010
1:32
2 ms
011
1:128
7 ms
100
1:512
26 ms
101
1:1024
52 ms
110
1:2048
105 ms
111
1:4096
210 ms
T
OSC
() 1024
() Prescaler rate
()
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