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| 型號(hào)： | MCP4725A2T-E/CH |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 20/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT EE W/I2C SOT23-6 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 6µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | EEPROM，I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 673 (CN2011-ZH PDF) |
| 配用： | MCP4725DM-PTPLS-ND - BOARD DAUGHTER PICTAIL MCP4725 |
| 其它名稱： | MCP4725A2T-E/CHDKR |
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2009 Microchip Technology Inc.
DS22039D-page 27
MCP4725
7.0
I2C SERIAL INTERFACE
COMMUNICATION
7.1
OVERVIEW
The MCP4725 device uses a two-wire I2C serial
interface that can operate on a standard, fast or high
speed mode. A device that sends data onto the bus is
defined as transmitter, and a device receiving data as
receiver. The bus has to be controlled by a master
device which generates the serial clock (SCL), controls
the bus access and generates the START and STOP
conditions. The MCP4725 device works as slave. Both
master and slave can operate as transmitter or
receiver, but the master device determines which mode
is activated. An example of hardware connection
diagram is shown in Figure 8-1. Communication is
initiated by the master (microcontroller) which sends
the START bit, followed by the slave address byte. The
first byte transmitted is always the slave address byte,
which contains the device code, the address bits, and
the R/W bit. The device code for the MCP4725 device
is 1100.
When the device receives a read command (R/W = 1),
it transmits the contents of the DAC input register and
EEPROM. A non-acknowledge (NAK) or repeated
START bit can be transmitted at any time. See
Figure 6-3 for the read operation example. If writing to
the device (R/W = 0), the device will expect write com-
mand type bits in the following byte. See Figure 6-1
and Figure 6-2 for the write operation examples.
The MCP4725 supports all three I2C operating modes:
Standard Mode: bit rates up to 100 kbit/s
Fast Mode: bit rates up to 400 kbit/s
High Speed Mode (HS mode): bit rates up to
3.4 Mbit/s
Refer to the Phillips I2C document for more details of
the I2C specifications.
7.2
Device Addressing
The address byte is the first byte received following the
START condition from the master device. The first part
of the address byte consists of a 4-bit device code
which is set to 1100 for the MCP4725. The device code
is followed by three address bits (A2, A1, A0) which are
programmed as follows:
The choice of A2 and A1 bits are provided by the
customer as part of the ordering process. These
bits are then programmed (hard-wired) during
manufacturing
The A2 and A1 are programmed to ‘00’ (default),
if not requested by customer
A0 bit is determined by the logic state of A0 pin.
The A0 pin can be tied to VDD or VSS, or can be
actively driven by digital logic levels. The
advantage of using the A0 pin is that the users
can control the A0 bit on their application PCB
circuit and also two identical MCP4725 devices
can be used on the same bus line.
When the device receives an address byte, it compares
the logic state of the A0 pin with the A0 address bit
received before responding with the acknowledge bit.
The logic state of the A0 pin needs to be set prior to the
interface communication.
FIGURE 7-1:
Device Addressing.
START bit
Read/Write bit
Address Byte
R/W ACK
Acknowledge bit
Slave Address
1
0
Slave Address for MCP4725
A2 A1 A0
Note: A2 and A1: Programmed (hard-wired) at the factory.
Please Contact Microchip Technology Inc. for A2 and
A1 programming options.
A0: Use the logic level state of A0 pin.
Device Code
Address Bits
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