參數(shù)資料
型號(hào)： MCP6409-H/SL
廠商： Microchip Technology
文件頁(yè)數(shù)： 10/44頁(yè)
文件大?。?/td> 0K
描述： IC OPAMP QUAD 1.8V 1MHZ 14SOIC
標(biāo)準(zhǔn)包裝： 57
放大器類型： 通用
電路數(shù)： 4
輸出類型： 滿擺幅
轉(zhuǎn)換速率： 0.5 V/µs
增益帶寬積： 1MHz
電流 - 輸入偏壓： 1pA
電壓 - 輸入偏移： 4500µV
電流 - 電源： 45µA
電流 - 輸出 / 通道： 15mA
電壓 - 電源，單路/雙路(±)： 1.8 V ~ 6 V
工作溫度： -40°C ~ 150°C
安裝類型： 表面貼裝
封裝/外殼： 14-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 14-SOICN
包裝： 管件
MCP6401/1R/1U/2/4/6/7/9
DS22229D-page 18
2009-2011 Microchip Technology Inc.
4.2
Rail-to-Rail Output
The
output
voltage
range
of
the
MCP6401/1R/1U/2/4/6/7/9 op amps is VSS +20mV
(minimum) and VDD – 20 mV (maximum) when
RL =10kΩ is connected to VDD/2 and VDD =6.0V.
Refer to Figures 2-26 and 2-27 for more information.
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to capacitive loads, all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 4-4) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
gives
recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
After selecting RISO for your circuit, double-check the
resulting
frequency
response
peaking
and
step
response overshoot. Modify RISO’s value until the
response
is
reasonable.
Bench
evaluation
and
simulations with the MCP6401/1R/1U/2/4/6/7/9 SPICE
macro model are very helpful.
4.4
Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 F or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
4.5
Unused Op Amps
An unused op amp in quad packages (MCP6404 or
MCP6409) should be configured as shown in Figure 4-
6. These circuits prevent the output from toggling and
causing crosstalk. Circuit A sets the op amp at its
minimum noise gain. The resistor divider produces any
desired reference voltage within the output voltage
range of the op amp, which buffers that reference
voltage. Circuit B uses the minimum number of
components and operates as a comparator, but it may
draw more current.
FIGURE 4-6:
Unused Op Amps.
VIN
RISO
VOUT
CL
–
+
MCP640x
1
10
100
1000
10000
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
Normalized Load Capacitance; CL/GN (F)
R
eco
m
ende
d
R
IS
O
(
)
GN:
1 V/V
2 V/V
≥ 5 V/V
VDD = 6.0 V
RL = 10 k
10p
100p
1n
10n
0.1
1
VDD
R1
R2
VDD
VREF
V
REF
V
DD
R
2
R
1
R
2
+
-------------------
×
=
MCP6404 (A)
MCP6404 (B)
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