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參數(shù)資料
| 型號： | MCP7940MT-I/MNY |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 14/19頁 |
| 文件大小： | 0K |
| 描述： | IC RTCC I2C 64B SRAM 8-TDFN |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 類型： | 時鐘/日歷 |
| 特點(diǎn)： | 警報器，閏年，方波輸出，SRAM |
| 存儲容量： | 64B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-TDFN（2x3） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | MCP7940MT-I/MNY-ND MCP7940MT-I/MNYTR |
MCP7940M
DS22292A-page 4
Preliminary
2012 Microchip Technology Inc.
TABLE 1-2:
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
VCC = +1.8V to 5.5V
TA = -40°C to +85°C
Param.
No.
Symbol
Characteristic
Min.
Max.
Units
Conditions
1FCLK
Clock frequency
—
100
400
kHz
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
2THIGH
Clock high time
4000
600
—
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
3TLOW
Clock low time
4700
1300
—
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
4TR
SDA and SCL rise time
—
1000
300
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
5TF
SDA and SCL fall time
—
1000
300
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
6THD:STA Start condition hold time
4000
600
—
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
7TSU:STA
Start condition setup time
4700
600
—
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
8THD:DAT Data input hold time
0
—
ns
9TSU:DAT Data input setup time
250
100
—
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
10
TSU:STO Stop condition setup time
4000
600
—
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
11
TAA
Output valid from clock
—
3500
900
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
12
TBUF
Bus free time: Time the bus
must be free before a new
transmission can start
4700
1300
—
ns
1.8V
VCC < 2.5V
2.5V
VCC 5.5V
13
TSP
Input filter spike suppression
(SDA and SCL pins)
—50
ns
Note 1: Not 100% tested.
2: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
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