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參數(shù)資料
| 型號(hào)： | MCS7840 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | USB-2.0 to Four Serial Ports |
| 中文描述： | 的USB 2.0 4個(gè)串行端口 |
| 文件頁數(shù)： | 7/41頁 |
| 文件大?。?/td> | 447K |
| 代理商： | MCS7840 |
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MCS7840
USB-2.0 to Four Serial Ports
Rev.
1.2
Page 7
Functional Block Descriptions
Internal Regulators
An internal DC-DC Regulator is provided to convert
5V to 1.8V for Core Logic. An additional regulator is
provided to convert the 5V input to 3.3V for I/O functions.
These regulators eliminate the need for external voltage
sources.
USB-2.0 PHY
This is the physical layer of the USB interface. The
USB-2.0 PHY communicates with the USB-2.0 Device
Controller logic through a UTMI interface to send/receive
data on the USB bus.
USB-2.0 Device Controller
The USB-2.0 Device Controller interfaces to the internal
bridge and communicates with the serial ports through
the bridge logic. The device controller logic is connected
to a physical layer USB-2.0 PHY which provides the USB
bus interface for the chip. The device controller responds
to standard as well as vendor speci
fi
c requests from
USB-2.0 and USB-1.1 Hosts.
Bridge
The bridge logic controls traf
fi
c between the USB-2.0
Device Controller and the Serial Port Controllers. The
bridge logic has synchronous RAM memories with ping-
pong FIFO control logic to buffer data in either direction
(Bulk-In and Bulk-Out) and send it to the other side
without loss. Control logic prevents over
fl
ow or under
fl
ow
conditions in the memory.
UART / Serial Port Controllers
The Serial Port Controllers are linked to the bridge and
send/receive data from the bridge interface. Each serial
port controller has register logic controlling BAUD rates
(50 bps – 6 Mbps), stop-bits, and parity bit settings.
Each serial port has synchronous RAM memories acting
as transmit and receive FIFOs to buffer outgoing and
incoming data. This block has registers for interrupts, line
status, and line control features which can be accessed
by software. The Serial Port Controllers can interface to
external RS-232 / RS-422 / RS-485 transceivers.
Vendor Speci
fi
c Command Processor
The bridge logic interfaces to a vendor speci
fi
c command
processor block containing commands/register settings
(BAUD settings etc.) which are speci
fi
c to this device.
Interrupt-In Block
The Interrupt-In controller block gives the status of the
serial port interrupt registers to the USB-2.0 Device
Controller. The USB host controller periodically polls the
interrupt endpoint and reads the status of the interrupts.
Wakeup Block
The Wakeup block is used for remote wakeup control.
The USB host can suspend operation of the device. The
remote wakeup block checks for activity on the serial port
pins, and if information is available, it issues a remote
wakeup request to the USB-2.0 Device Controller. The
Device Controller in turn requests a remote wakeup
by the external host. The host issues the “Resume
Signaling” command to the device, which then resumes
normal operation.
I
2
C EEPROM Controller
The I
2
C EEPROM Controller interfaces to an external
EEPROM and retrieves information necessary for serial
port settings, Product-IDs, Vendor-IDs and other control
information. The EEPROM controller logic communicates
with the USB-2.0 Device Controller block which uses the
information from the external EEPROM.
Clock Generation and Resets
The Clock Generation logic is used to generate the clocks
for the various BAUD rates supported by the device. The
Resets block has logic for synchronous de-assertion and
asynchronous assertion of Resets in the respective clock
domains to various blocks.
BAUD Clock Generators
The BAUD Clock Generator block generates clocks for
each of the Serial Port Controllers depending on the
BAUD settings from the host. A source clock is generated
from the Clock Recovery block which is further divided or
used as is by the BAUD Clock Generator logic depending
on the BAUD settings.
PLL Clock Generator
The PLL generates a master clock which the other
blocks use to generate the various BAUD rates. The PLL
supports a wide range of clock inputs to support industrial
standard serial port bit rates, as well as custom BAUD
rates.
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