- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69032 > MCV14AI/P 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDIP14 PDF資料下載
參數(shù)資料
| 型號： | MCV14AI/P |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDIP14 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-14 |
| 文件頁數(shù)： | 46/84頁 |
| 文件大?。?/td> | 1007K |
| 代理商： | MCV14AI/P |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當(dāng)前第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁
MCV14A
DS41338B-page 48
Preliminary
2009 Microchip Technology Inc.
7.9
Program Verification/Code
Protection
If the code protection bit has not been programmed, the
on-chip program memory can be read out for
verification purposes.
The first 64 locations and the last location (OSCCAL)
can be read, regardless of the code protection bit
setting.
The last memory location can be read regardless of the
code protection bit setting on the MCV14A device.
7.10
ID Locations
Four memory locations are designated as ID locations
where the user can store checksum or other code
identification
numbers.
These
locations
are
not
accessible during normal execution, but are readable
and writable during Program/Verify.
Use only the lower 4 bits of the ID locations and always
program the upper 8 bits as ‘0’s.
7.11
In-Circuit Serial Programming
The
MCV14A
microcontroller
can
be
serially
programmed while in the end application circuit. This is
simply done with two lines for clock and data, and three
other lines for power, ground and the programming
voltage. This allows customers to manufacture boards
with unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware, or a custom
firmware, to be programmed.
The devices are placed into a Program/Verify mode by
holding the RB1 and RB0 pins low while raising the
MCLR (VPP) pin from VIL to VIHH. RB1 becomes the
programming clock and B0 becomes the programming
data. Both RB1 and RB0 are Schmitt Trigger inputs in
this mode.
After Reset, a 6-bit command is then supplied to the
device. Depending on the command, 14 bits of program
data are then supplied to or from the device, depending
if the command was a Load or a Read.
A typical In-Circuit Serial Programming connection is
shown in Figure 7-12.
FIGURE 7-12:
TYPICAL IN-CIRCUIT
SERIAL PROGRAMMING
CONNECTION
External
Connector
Signals
To Normal
Connections
To Normal
Connections
VDD
VSS
MCLR/VPP
RB1
RB0
+5V
0V
VPP
CLK
Data I/O
VDD
MCV14A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MD8031AHB883B | 8-BIT, 12 MHz, MICROCONTROLLER, CDIP40 |
| MD8255A | 24 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| MD82C52-/883 | 1 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, CDIP28 |
| MR82C52-/883 | 1 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, CQCC28 |
| MD82C55A-5/B | 24 I/O, PIA-GENERAL PURPOSE, CDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCV15/10-GF-381 | 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 10WAY |
| MCV15/2-GF-381 | 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 2WAY |
| MCV15/3-GF-381 | 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 3WAY |
| MCV15/4-GF-381 | 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 4WAY |
| MCV15/5-GF-381 | 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 5WAY |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。