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參數(shù)資料
| 型號(hào)： | MCW68332A |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MICROCONTROLLER, UUC |
| 封裝： | WAFER |
| 文件頁(yè)數(shù)： | 67/111頁(yè) |
| 文件大?。?/td> | 650K |
| 代理商： | MCW68332A |
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MC68332
MOTOROLA
MC68332TS/D
59
TCR1P — Timer Count Register 1 Prescaler Control
TCR1 is clocked from the output of a prescaler. The prescaler's input is the internal TPU system clock
divided by either 4 or 32, depending on the value of the PSCK bit. The prescaler divides this input by 1,
2, 4, or 8. Channels using TCR1 have the capability to resolve down to the TPU system clock divided
by 4.
TCR2P — Timer Count Register 2 Prescaler Control
TCR2 is clocked from the output of a prescaler. If T2CG = 0, the input to the TCR2 prescaler is the ex-
ternal TCR2 clock source. If T2CG = 1, the input is the TPU system clock divided by eight. The TCR2P
field specifies the value of the prescaler: 1, 2, 4, or 8. Channels using TCR2 have the capability to re-
solve down to the TPU system clock divided by 8. The following table is a summary of prescaler output.
PSCK = 0
PSCK = 1
TCR1 Prescaler
Divide
By
Number of
Clocks
Rate at
16 MHz
Number of
Clocks
Rate at
16 MHz
00
1
32
2 ms
4
250 ns
01
2
64
4 ms
8
500 ns
10
4
128
8 ms
16
1 ms
11
8
256
16 ms
32
2 ms
TCR2 Prescaler
Divide By
Internal Clock Divided
By
External Clock Divided
By
00
181
012162
104324
118648
TCR1
015
PSCK
MUX
÷ 4
DIV4 CLOCK
÷ 32
DIV32 CLOCK
TCR1
PRESCALER
00
÷ 1
01
÷ 2
10
÷ 4
11
÷ 8
SYSTEM
CLOCK
1 – DIV4
0 – DIV32
PRESCALER CTL BLOCK 1
PRESCALER CTL BLOCK 2
DIGITAL
FILTER
EXTERNAL
TCR2 PIN
TCR2
(T2CG CONTROL BIT)
0 – A
1 – B
015
A
B
MUX
CONTROL
TCR2
PRESCALER
00
÷ 1
01
÷ 2
10
÷ 4
11
÷ 8
INT CLK /8
SYNCHRONIZER
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