參數(shù)資料
型號(hào): MCZ33399EF
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Local Interconnect Network (LIN) Physical Interface
中文描述: 本地互連網(wǎng)絡(luò)(LIN)物理接口
文件頁數(shù): 10/19頁
文件大?。?/td> 234K
代理商: MCZ33399EF
Analog Integrated Circuit Device Data
Freescale Semiconductor
10
33399
FUNCTIONAL DESCRIPTION
TIMING DIAGRAMS
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33399 is a Physical Layer component dedicated to
automotive LIN sub-bus applications.
The 33399 features include speed communication from
1.0 kbps to 20 kbps, up to 60 kbps for Programming Mode,
and active bus waveshaping to minimize radiated emission.
The device offers three different wake-up capabilities:
wake-up from LIN bus, wake-up from the MCU command,
and dedicated high voltage wake-up input.
The INH output may be used to control an external voltage
regulator.
FUNCTIONAL PIN DESCRIPTION
POWER SUPPLY PIN (VSUP)
The V
SUP
power supply pin is connected to a battery
through a serial diode for reverse battery protection. The DC
operating voltage is from 7.0 V to 27 V. This pin sustains
standard automotive voltage conditions such as 27 V DC
during jump-start conditions and 40 V during load dump. To
avoid a false bus message, an undervoltage reset circuitry
disables the transmission path (from TXD to LIN) when V
SUP
falls below 7.0 V. Supply current in the Sleep mode is
typically 20
μ
A.
GROUND PIN (GND)
In case of a ground disconnection at the module level, the
33399 does not have significant current consumption on the
LIN bus pin when in the recessive state. (Less than 100 μA is
sourced from LIN bus pin, which creates 100 mV drop
voltage from the 1.0 k
LIN bus pullup resistor.) For the
dominant state, the pullup resistor should always be active.
The 33399 handles a ground shift up to 3.0 V when
V
SUP
> 9.0 V. Below 9.0 V V
SUP
, a ground shift can reduce
V
SUP
value below the minimum V
SUP
operation of 7.0 V.
LIN BUS PIN (LIN)
The LIN bus pin represents the single-wire bus transmitter
and receiver.
Transmitter Characteristics
The LIN driver is a low-side MOSFET with internal current
limitation and thermal shutdown. An internal pullup resistor
with a serial diode structure is integrated so no external
pullup components are required for the application in a slave
node. An additional pullup resistor of 1.0 k
must be added
when the device is used in the master node.
Voltage can go from - 18 V to 40 V without current other
than the pullup resistance. The LIN pin exhibits no reverse
current from the LIN bus line to V
SUP
, even in the event of
GND shift or V
PWR
disconnection. LIN thresholds are
compatible with the LIN protocol specification.
The fall time from recessive to dominant and the rise time
from dominant to recessive are controlled to typically
2.0 V/μs. The symmetry between rise and fall time is also
guaranteed.
When going from dominant to recessive, the bus
impedance parasitic capacitor must be charged up to V
SUP.
This charge-up is achieved by the total system pullup current
resistors. In order to guarantee that the rise time is within
specification, maximum bus capacitance should not exceed
10 nF with bus total pullup resistance less than 1.0 k
.
Receiver Characteristics
The receiver thresholds are ratiometric with the device
supply pin. Typical threshold is 50%, with a hysteresis
between 5% and 10% of V
SUP
.
DATA INPUT PIN (TXD)
The TXD input pin is the MCU interface that controls the
state of the LIN output. When TXD is LOW, LIN output is
LOW; when TXD is HIGH, the LIN output transistor is turned
OFF.
This pin has an internal 5.0 V internal pullup current
source to set the bus in a recessive state in case the MCU is
not able to control it; for instance, during system power-up/
power-down. During the Sleep mode, the pullup current
source is turned OFF.
DATA OUTPUT PIN (RXD)
The RXD output pin is the MCU interface that reports the
state of the LIN bus voltage. LIN HIGH (recessive) is reported
by a high level on RXD; LIN LOW (dominant) is reported by a
low voltage on RXD. RXD output structure is a CMOS-type
push-pull output stage.
ENABLE INPUT PIN (EN)
The EN pin controls the operation mode of the interface. If
EN = logic [1], the interface is in normal mode, with the
transmission path from TXD to LIN and from LIN to RXD both
active. If EN = logic [0], the device is in Sleep mode or low
power mode, and no transmission is possible.
In Sleep mode, the LIN bus pin is held at V
SUP
through the
bus pullup resistors and pullup current sources. The device
can transmit only after being awakened. Refer to the
INHIBIT
OUTPUT PIN (INH)
description on page
11
.
During Sleep mode, the device is still supplied from the
battery voltage (through V
SUP
pin). Supply current is 20 μA
typical. Setting the EN pin to LOW will turn the INH to high
impedance. The EN pin has an internal 20 μA pulldown
current source to ensure the device is in Sleep mode if EN
floats.
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