DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMI" />
參數(shù)資料
型號(hào): MCZ33742SEG
廠商: Freescale Semiconductor
文件頁數(shù): 8/71頁
文件大小: 0K
描述: IC SYSTEM BASIS CHIP CAN 28-SOIC
標(biāo)準(zhǔn)包裝: 26
應(yīng)用: 自動(dòng)
電流 - 電源: 42mA
電源電壓: 5.5 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
Analog Integrated Circuit Device Data
16
Freescale Semiconductor
33742
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 6. Dynamic Electrical Characteristics
Characteristics noted under conditions 4.75 V
V2 5.25 V, 5.5 V VSUP 18 V, and -40 C TA 125 C. Typical values
noted reflect the approximate parameter mean at TA = 25 C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
DIGITAL INTERFACE TIMING (SCLK, CS, MOSI, MISO)(29)
SPI Operation Frequency
fREQ
0.25
4.0
MHz
SCLK Clock Period
tPCLK
250
N/A
ns
SCLK Clock High Time
tWSCLKH
125
N/A
ns
SCLK Clock Low Time
tWSCLKL
125
N/A
ns
Falling Edge of CS to Rising Edge of SCLK
tLEAD
100
N/A
ns
Falling Edge of SCLK to Rising Edge of CS
tLAG
100
N/A
ns
MOSI to Falling Edge of SCLK
tSISU
40
N/A
ns
Falling Edge of SCLK to MOSI
tSIH
40
N/A
ns
MISO Rise Time(30)
CL = 220 pF
tRSO
25
50
ns
MISO Fall Time(30)
CL = 220 pF
tFSO
25
50
ns
Time from Falling or Rising Edges of CS
MISO Low-impedance
MISO High-impedance
tSOEN
tSODIS
50
ns
Time from Rising Edge of SCLK to MISO Data Valid
0.2 VDD MISO 0.8 VDD, CL = 200 pF
tVALID
50
ns
STATE MACHINE TIMING (CS, SCLK, MOSI, MISO, WDOG, INT)
Delay Between CS LOW-to-HIGH Transition (at End of SPI Stop Command)
and Stop mode Activation(31)
tCS-STOP
18
34
s
Interrupt Low-level Duration
Stop Mode
tINT
7.0
10
13
s
Internal Oscillator Frequency(32)
fOSC
100
kHz
Notes
29.
30.
Not production tested. Guaranteed by design.
31.
Not production tested. Guaranteed by design. Detected by V2 OFF.
32.
fOSC is indirectly measured (1.0 ms reset) and trimmed.
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