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參數(shù)資料
| 型號(hào)： | MCZ33993EW |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | Multiple Switch Detection Interface |
| 中文描述： | 多交換檢測(cè)接口 |
| 文件頁(yè)數(shù)： | 3/28頁(yè) |
| 文件大小： | 504K |
| 代理商： | MCZ33993EW |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
3
33993
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 33993 Pin Connections
Table 1. 33993 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 9
.
Pin Number
Pin Name
Formal Name
Definition
1
GND
Ground
Ground for logic, analog, and switch to battery inputs.
2
SI
SPI Slave In
SPI control data input pin from MCU to the 33993.
3
SCLK
Serial Clock
SPI control clock input pin.
4
CS
Chip Select
SPI control chip select input pin from MCU to the 33993. Logic 0 allows data to be
transferred in.
5 – 8
25 – 28
SP0 – 3
SP4 – 7
Programmable Switches
0 – 7
Programmable switch-to-battery or switch-to-ground input pins.
9 – 15,
18 – 24
SG0 – 6,
SG13 – 7
Switch-to-Ground Inputs
0 – 13
Switch-to-ground input pins.
16
V
PWR
Battery Input
Battery supply input pin. Pin requires external reverse battery protection.
17
WAKE
Wake-Up
Open drain wake-up output. Designed to control a power supply enable pin.
29
INT
Interrupt
Open-drain output to the MCU. Used to indicate an input switch change of state.
30
AMUX
Analog Multiplex Output
Analog multiplex output.
31
V
DD
Voltage Drain Supply
3.3 5.0 V supply. Sets SPI communication level for the SO driver.
32
SO
SPI Slave Out
Provides digital data from 33993 to the MCU.
SO
VDD
AMUX
1
2
SP7
SP6
SP5
SP4
SG7
SG8
SG9
SG10
SG11
SG12
SG13
WAKE
INT
GND
SP0
SP1
SP2
SP3
SG0
SG1
SG2
SG3
SG4
SG5
SG6
VPWR
CS
SI
SCLK
8
9
10
11
12
13
14
15
16
3
4
5
6
7
32
31
25
24
23
22
21
20
19
18
17
30
29
28
27
26
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