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參數(shù)資料
| 型號(hào)： | MD80C32-30 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 30 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁(yè)數(shù)： | 197/210頁(yè) |
| 文件大?。?/td> | 5175K |
| 代理商： | MD80C32-30 |
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87
8048C–AVR–02/12
ATtiny43U
put is set on Compare Match and cleared at BOTTOM. Due to the single-slope operation, the
operating frequency of the fast PWM mode can be twice as high as the phase correct PWM
mode that use dual-slope operation. This high frequency makes the fast PWM mode well suited
for power regulation, rectification, and DAC applications. High frequency allows physically small
sized external components (coils, capacitors), and therefore reduces total system cost.
In fast PWM mode, the counter is incremented until the counter value matches the TOP value.
The counter is then cleared at the following timer clock cycle. The timing diagram for the fast
PWM mode is shown in Figure 12-6 on page 87. The TCNTn value is in the timing diagram
shown as a histogram for illustrating the single-slope operation. The diagram includes non-
inverted and inverted PWM outputs. The small horizontal line marks on the TCNTn slopes repre-
sent Compare Matches between OCRnx and TCNTn.
Figure 12-6. Fast PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOVn) is set each time the counter reaches TOP. If the inter-
rupt is enabled, the interrupt handler routine can be used for updating the compare value.
In fast PWM mode, the compare unit allows generation of PWM waveforms on the OCnx pins.
Setting the COMnx[1:0] bits to two will produce a non-inverted PWM and an inverted PWM out-
put can be generated by setting the COMnx[1:0] to three: Setting the COMnA[1:0] bits to one
allowes the OCnA pin to toggle on Compare Matches if the WGMn2 bit is set. This option is not
available for the OCnB pin (See Table 12-3 on page 92). The actual OCnx value will only be vis-
ible on the port pin if the data direction for the port pin is set as output. The PWM waveform is
generated by setting (or clearing) the OCnx Register at the Compare Match between OCRnx
and TCNTn, and clearing (or setting) the OCnx Register at the timer clock cycle the counter is
cleared (changes from TOP to BOTTOM).
The PWM frequency for the output can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
TCNTn
OCRnx Update and
TOVn Interrupt Flag Set
1
Period
2
3
OCn
(COMnx[1:0] = 2)
(COMnx[1:0] = 3)
OCRnx Interrupt Flag Set
4
5
6
7
f
OCnxPWM
f
clk_I/O
N 256
------------------
=
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MD80C51 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller |
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| MD80C86 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MD80C862 | 制造商:Intel 功能描述:PROCESSOR:MICRO-PROCESSOR |
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