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參數(shù)資料
| 型號： | MG65P |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 0.25レm Embedded DRAM/ Customer Structured Arrays |
| 中文描述： | 0.25レ米嵌入式DRAM /客戶結(jié)構(gòu)數(shù)組 |
| 文件頁數(shù)： | 14/22頁 |
| 文件大?。?/td> | 267K |
| 代理商： | MG65P |
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MG63P/64P/65P
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Oki Semiconductor
OKI ADVANCED DESIGN CENTER CAD TOOLS
Oki’s advanced design center CAD tools include support for the following:
Floorplanning for front-end simulation and back-end layout control
Clock tree structures improve first-time silicon success by eliminating clock skew problems
JTAG Boundary scan support
Power calculation which predicts circuit power under simulation conditions to accurately model
package requirements
Vendor
Platform
Operating System
[1]
1.
2.
3.
4.
Contact Oki Application Engineering for current software versions.
Sun or Sun-compatible.
Sun and HP platform only.
In development.
Vendor Software/Revision
Description
Cadence
HP9000, 7xx
IBM RS6000
Sun
[2]
HP-UX
AIX
SunOS, Solaris
Composer
Verilog
NC-Verilog
Veritime
Verifault
Concept
[3]
Leapfrog
Design capture
Simulation
Simulation
Timing analysis
Fault grading
Design capture
VHDL simulation
IKOS
HP9000, 7xx,
Sun
HP-UX, SunOS, Solaris
NSIM
Gemini/Voyager
Simulation
Mentor Graphics
HP9000, 7xx
Sun
[2]
HP-UX
SunOS, Solaris
IDEA
QuickVHDL
QuickSim II
DFT Advisor
Fastscan
Design capture
VHDL simulation
Logic simulation
Test synthesis
ATPG
Model Technology
Inc. (MTI)
HP9000, 7xx
Sun
[2]
PC
HP-UX
SunOS, Solaris
Win/NT
V-System
VHDL simulation
Synopsys
(Interface to Mentor
Graphics,
VIEWLogic)
IBM RS6000
HP9000, 7xx
Sun
AIX
HP-UX
SunOS, Solaris
Design Compiler
HDL/VHDL Compiler
Test Compiler
VSS
Compilation
Design synthesis
Test synthesis
VHDL simulation
VIEWLogic
PC
Sun
[2]
Windows, Win/NT
[4]
SunOS, Solaris
Powerview
Fusion HDL
Simulation
VHDL/Verilog Simulation
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