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參數(shù)資料
| 型號： | MH32D64KQH-75 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 5.0 A 1.0MHZ FULLY INTEG |
| 中文描述： | 2147483648位（33554432字64位），雙數(shù)據(jù)速率同步DRAM模塊 |
| 文件頁數(shù)： | 8/40頁 |
| 文件大?。?/td> | 350K |
| 代理商： | MH32D64KQH-75 |
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MH32D64KQH-75,-10
2,147,483,648-BIT (33,554,432-WORD BY 64-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0417-0.2
17.May.2001
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
8
FUNCTION TRUTH TABLE (continued)
Current State
/S
/RAS /CAS
/WE
Address
Command
Action
WRITE
(Auto-
Precharge
Disabled)
H
X
X
X
X
DESEL
NOP (Continue Burst to END)
L
L
H
H
H
H
H
L
X
BA
NOP
TERM
NOP (Continue Burst to END)
ILLEGAL
L
H
L
H
BA, CA, A10
READ / READA
Terminate Burst, Latch CA,
Begin Read, Determine Auto-
Precharge
L
H
L
L
BA, CA, A10
WRITE /
WRITEA
Terminate Burst, Latch CA,
Begin Write, Determine Auto-
Precharge
L
L
H
H
BA, RA
ACT
Bank Active / ILLEGAL
L
L
L
L
H
L
L
H
BA, A10
X
PRE / PREA
REFA
Terminate Burst, Precharge
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
READ with
AUTO
PRECHARGE
H
X
X
X
X
DESEL
NOP (Continue Burst to END)
L
H
H
H
X
NOP
NOP (Continue Burst to END)
L
H
H
L
BA
TERM
ILLEGAL
L
H
L
H
BA, CA, A10
READ / READA ILLEGAL
L
H
L
L
BA, CA, A10
WRITE /
WRITEA
ILLEGAL
L
L
H
H
BA, RA
ACT
Bank Active / ILLEGAL
L
L
H
L
BA, A10
PRE / PREA
PRECHARGE/ILLEGAL
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
WRITE with
AUTO
PRECHARGE
H
X
X
X
X
DESEL
NOP (Continue Burst to END)
L
H
H
H
X
NOP
NOP (Continue Burst to END)
L
H
H
L
BA
TERM
ILLEGAL
L
H
L
H
BA, CA, A10
READ / READA ILLEGAL
WRITE /
WRITEA
L
H
L
L
BA, CA, A10
ILLEGAL
L
L
H
H
BA, RA
ACT
Bank Active / ILLEGAL
L
L
H
L
BA, A10
PRE / PREA
PRECHARGE/ILLEGAL
L
L
L
H
X
Op-Code,
Mode-Add
REFA
ILLEGAL
L
L
L
L
MRS
ILLEGAL
Notes
3
3
2
2
2
2
2
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| MH32D64AKQJ-10 | Circular Connector; No. of Contacts:56; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:24-4 RoHS Compliant: No |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MH32D72AKLA-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| MH32D72AKLA-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| MH32D72AKLB-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| MH32D72AKLB-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| MH32D72KLH-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
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