參數(shù)資料
型號(hào): MH32S72VJA-6
廠商: Mitsubishi Electric Corporation
英文描述: 2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
中文描述: 2415919104位(33554432 - Word的72位)同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器
文件頁(yè)數(shù): 1/56頁(yè)
文件大?。?/td> 917K
代理商: MH32S72VJA-6
2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH32S72AQJA-7, -8
17/Mar./2000
MIT-DS-0371-0.2
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
DESCRIPTION
APPLICATION
Main memory unit for computers, Microcomputer memory.
1
1pin
10pin
11pin
40pin
41pin
84pin
85pin
94pin
95pin
124pin
125pin
168pin
The MH32S72AQJA is 33554432 - word x 72-bit
Synchronous DRAM module. This consist of eighteen
industry standard 32M x 4 Synchronous DRAMs in
TSOP.
The TSOP on a card edge dual in-line package provides
any application where high densities and large of
quantities memory are required.
This is a socket-ty pe memory module ,suitable for
easy interchange or addition of module.
FEATURES
6ns (CL = 2)
-7
Utilizes industry standard 32M X 4 Synchronous DRAMs in
TSOP package , industry standard Resistered buffer in TSSOP
package and industry standard PLL in TSSOP package
Single 3.3V +/- 0.3V supply
LVTTL Interface
Burst length 1/2/4/8/Full Page(programmable)
Burst W rite / Single W rite(programmable)
Auto precharge / All bank precharge controlled by A10
Auto refresh and Self refresh
4096 refresh cycles every 64ms
Max.
Frequency
CLK
Access Time
[component level]
100MHz
Discrete IC and module design conform to
PC/100 specification.
(module Spec. Rev. 1.2 and SPD 1.2A)
6ns (CL = 3)
-8
100MHz
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