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參數(shù)資料
| 型號： | MH32V7245BST-5 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | HYPER PAGE MODE 2415919104 - BIT ( 33554432 - WORD BY 72 - BIT ) DYNAMIC RAM |
| 中文描述： | 超頁模式2415919104 -位（33554432 - Word的72 -位）動態(tài)隨機(jī)存儲器 |
| 文件頁數(shù)： | 21/22頁 |
| 文件大?。?/td> | 138K |
| 代理商： | MH32V7245BST-5 |
MITSUBISHI LSIs
MH32V7245BST -5, -6
Preliminary Spec.
MITSUBISHI
ELECTRIC
13/JUL./1998
HYPER PAGE MODE 2415919104 - BIT ( 33554432 - WORD BY 72 - BIT ) DYNAMIC RAM
MIT - DS - 0218-0.0
Hidden Refresh Cycle (Read)
(Note 31)
Note 31: Early write, delayed write, read write or read modify write cycle is applicable instead of read cycle.
Timing requirements and output state are the same as that of each cycle shown above.
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
t
CRP
t
ASR
t
RAH
t
RAD
t
RCD
t
CAH
t
RCS
t
RAS
t
RC
t
CHR
t
CAC
t
AA
t
CLZ
t
RAC
t
DZO
t
RRH
t
ASR
t
RP
Hi-Z
ADDRESS
COLUMN
ADDRESS
ROW
ADDRESS
DATA VALID
t
RAS
t
RC
t
RP
t
RSH
ROW
t
ASC
t
RAL
Hi-Z
t
DZC
V
IH
V
IL
Hi-Z
t
OEA
t
ORH
t
ODD
t
OEZ
t
REZ
t
OHR
t
CDD
t
RCH
t
RDD
t
OHC
t
OFF
/RAS
/W
/OE
/ CAS
21
DQ
(INPUTS)
DQ
(OUTPUTS)
A0,B0~A11
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