參數(shù)資料
型號(hào)： MH64D64AKQH-10
廠(chǎng)商： Mitsubishi Electric Corporation
元件分類(lèi)： 圓形連接器
英文描述： Circular Connector; No. of Contacts:55; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:22-55 RoHS Compliant: No
中文描述： 4294967296位（67108864字64位），雙數(shù)據(jù)速率同步DRAM模塊
文件頁(yè)數(shù)： 17/40頁(yè)
文件大小： 362K
代理商： MH64D64AKQH-10
MH64D64AKQH-75,-10
4,294,967,296-BIT (67,108,864-WORD BY 64-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0418-0.1
17.May.2001
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
17
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70°C , Vdd = VddQ = 2.5 ± 0.2V, Vss = VssQ = 0V, Output Open, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70°C , Vdd = VddQ = 2.5 ± 0.2V, Vss =VssQ= 0V, unless otherwise noted)
640
48
48
2800
2960
1800
1920
1840
1960
960
1040
480
480
640
320
320
1440
1520
1400
1480
-10
-75
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active;
power-down mode; CKE VIL (MAX); t CK = t CK MIN
mA
mA
mA
SELF REFRESH CURRENT: CKE 0.2V
AUTO REFRESH CURRENT: t RC = t RFC (MIN)
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
bank active(Discrete); Address and control inputs changing once per
clock cycle; CL = 2.5; t CK = t CK MIN; DQ, DM and DQS inputs
changing twice per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;One
bank active(Discrete); Address and control inputs changing once per
clock cycle; CL = 2.5; t CK = t CK MIN; IOUT = 0 mA
ACTIVE STANDBY CURRENT: /CS > VIH (MIN); CKE > VIH (MIN);
One bank; Active-Precharge; t RC = t RAS MAX; t CK = t CK MIN;
DQ,DM and DQS inputs changing twice per clock cycle; address and
other control inputs changing once per clock cycle
IDLE STANDBY CURRENT: /CS > VIH (MIN); All banks idle;
CKE > VIH (MIN); t CK = t CK MIN; Address and other control inputs
changing once per clock cycle
IDD2P
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle;
power-down mode; CKE VIL (MAX); t CK = t CK MIN
mA
OPERATING CURRENT: One Bank(Discrete); Active-Read-Precharge;
Burst = 2; t RC = t RC MIN; CL = 2.5; t CK = t CK MIN; IOUT= 0
mA;Address and control inputs changing once per clock cycle
OPERATING CURRENT: One Bank(Discrete); Active-Precharge;
t RC = t RC MIN; t CK = t CK MIN; DQ, DM and DQS inputs changing
twice per clock cycle; address and control inputs changing once per
clock cycle
Parameter/Test Conditions
IDD4R
IDD3N
mA
mA
mA
mA
mA
mA
IDD6
IDD5
IDD4W
IDD3P
IDD2N
IDD1
IDD0
Notes
Unit
Limits(max)
Symbol
Symbol
Parameter/Test Conditions
Limits
Min.
Max.
Unit
VIH(AC)
VIL(AC)
VID(AC)
VIX(AC)
High-Level Input Voltage (AC)
Low-Level Input Voltage (AC)
Input Differential Voltage, CLK and /CLK
Input Crossing Point Voltage, CLK and /CLK
Vref + 0.35
Vref - 0.35
V
V
V
V
μA
0.7
0.5*Vdd-0.2
Vdd + 0.6
IOZ
I
i
Off-state Output Current /Q floating Vo=0~V
DD
Q
Input Current / VIN=0 ~ VddQ
μA
-10
-32
10
32
0.5*Vdd+0.2
Notes
7
8
9
相關(guān)PDF資料
PDF描述
MH64D64AKQH-75 Circular Connector; No. of Contacts:128; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:24-35 RoHS Compliant: No
MH88422BD-1 Data Access Arrangement Preliminary Information
MH88422 Line Interface Circuit Preliminary Information
MH88422-1 Data Access Arrangement Preliminary Information
MH88422-2 Data Access Arrangement Preliminary Information
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH64D64AKQH-75 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:4,294,967,296-BIT (67,108,864-WORD BY 64-BIT) Double Data Rate Synchronous DRAM Module
MH64D72KLG-10 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MH64D72KLG-75 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MH64D72KLH-10 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MH64D72KLH-75 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*