- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383601 > MH64D64AKQH-10 (Mitsubishi Electric Corporation) Circular Connector; No. of Contacts:55; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:22-55 RoHS Compliant: No PDF資料下載
參數(shù)資料
| 型號： | MH64D64AKQH-10 |
| 廠商： | Mitsubishi Electric Corporation |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:55; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:22-55 RoHS Compliant: No |
| 中文描述： | 4294967296位（67108864字64位），雙數(shù)據(jù)速率同步DRAM模塊 |
| 文件頁數(shù)： | 22/40頁 |
| 文件大小： | 362K |
| 代理商： | MH64D64AKQH-10 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
MH64D64AKQH-75,-10
4,294,967,296-BIT (67,108,864-WORD BY 64-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0418-0.1
17.May.2001
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
22
A precharge command can be issued at BL/2 from a read command without data loss.
Precharge all
Bank Activation and Precharge All (BL=8, CL=2)
Command
A0-9,11-12
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
0
00
ACT
Xb
Xb
01
PRE
tRRD
tRCD
1
ACT
Xb
Xb
01
tRAS
tRP
tRCmin
2 ACT command / tRCmin
DQS
Q a
BL/2
OPERATIONAL DESCRIPTION
(Component Level)
BANK ACTIVATE
The DDR SDRAM has four independent banks. Each bank is activated by the ACT command
with the bank addresses (BA0,1). A row is indicated by the row address A12-0. The minimum
activation interval between one bank and the other bank is tRRD.
PRECHARGE
The PRE command deactivates the bank indicated by BA0,1. When multiple banks are active,
the precharge all command (PREA,PRE+A10=H) is available to deactivate them at the same
time. After tRP from the precharge, an ACT command to the same bank can be issued.
Q a
Q a
Q a
Q a
Q a
Q a
Q a
/CLK
CLK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MH64D64AKQH-75 | Circular Connector; No. of Contacts:128; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:24-35 RoHS Compliant: No |
| MH88422BD-1 | Data Access Arrangement Preliminary Information |
| MH88422 | Line Interface Circuit Preliminary Information |
| MH88422-1 | Data Access Arrangement Preliminary Information |
| MH88422-2 | Data Access Arrangement Preliminary Information |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH64D64AKQH-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,294,967,296-BIT (67,108,864-WORD BY 64-BIT) Double Data Rate Synchronous DRAM Module |
| MH64D72KLG-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| MH64D72KLG-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| MH64D72KLH-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| MH64D72KLH-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
發(fā)布緊急采購，3分鐘左右您將得到回復。