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參數(shù)資料
| 型號： | MH64S64APFH-7L |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM |
| 中文描述： | 4294967296位（67108864 -文字，64位）SynchronousDRAM |
| 文件頁數(shù)： | 24/52頁 |
| 文件大小： | 604K |
| 代理商： | MH64S64APFH-7L |
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MITSUBISHI LSIs
( 24
MITSUBISHI
ELECTRIC
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0392-0.1
MH64S64APFH-6,-6L,-7,-7L
4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
16.Apr.2000
[ Write Interrupted by Precharge ]
Burst write operation can be interrupted by precharge of
the same bank
. Write
recovery time(tWR) is required from the last data to PRE command. During write
recovery, data inputs must be masked by DQM.
Write Interrupted by Precharge (BL=4)
CK
Command
A10
DQ
ACT
Xa
0
00
Write
0
00
Da0
Da1
DQMB0-7
ACT
Xa
0
00
tRP
[ Write Interrupted by Burst Terminate ]
Burst terminate command can terminate burst write operation. In this case, the
write recovery time is not required and the bank remains active.The WRITE to TBST
minimum interval is 1CK.
Write Interrupted by Burst Terminate (BL=4)
CK
Command
A10
DQ
ACT
Xa
0
00
TBST
Da0
Da1
A0-9,11-12
BA0,1
A0-9,11-12
BA0,1
Ya
PRE
0
00
tWR
Write
Ya
0
00
Write
Yb
0
00
Db0
Db1
Db2
Db3
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相關(guān)代理商/技術(shù)參數(shù) |
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| MH64S72AWJA-6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64S72AWJA-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64S72AWJA-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64S72QJA-6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 64,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64S72QJA-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
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