參數(shù)資料
型號(hào): MH64S72QJA-8
廠商: Mitsubishi Electric Corporation
英文描述: 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
中文描述: 4831838208位(67108864 - Word的72位)同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器
文件頁(yè)數(shù): 14/56頁(yè)
文件大?。?/td> 936K
代理商: MH64S72QJA-8
4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH64S72AWJA -6,-7,-8
17/Mar. /2000
MIT-DS-372-0.2
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Condition
Ratings
Unit
Vdd
VI
VO
IO
Pd
Topr
Tstg
Supply Voltage
Input Voltage
Output Voltage
Output Current
Power Dissipation
Operating Temperature
Storage Temperature
with respect to Vss
with respect to Vss
with respect to Vss
Ta=25°C
-0.5 ~ 4.6
-0.5 ~ 4.6
-0.5 ~ 4.6
50
39
0 ~ 70
-45 ~ 100
V
V
V
mA
W
°C
°C
RECOMMENDED OPERATING CONDITION
(Ta=0 ~ 70°C, unless otherwise noted)
Symbol
Vdd
Vss
VIH
VIL
Parameter
Supply Voltage
High-Level Input Voltage all inputs
Low-Level Input Voltage all inputs
Supply Voltage
Limits
Typ.
3.3
Unit
Min.
3.0
Max.
3.6
0
2.0
-0.3
0
0
Vdd+0.3
0.8
V
V
V
V
CAPACITANCE
(Ta=0 ~ 70°C, Vdd = 3.3 +/- 0.3V, Vss = 0V, unless otherwise noted)
Symbol
CI(A)
CI(C)
CI(CK)
CI(K)
CI/O
Parameter
Input Capacitance, address pin
Input Capacitance, control pin
Input Capacitance, CK pin
Input Capacitance, I/O pin
Test Condition
Limits(max.)
Unit
25
25
50
35
22
pF
pF
pF
pF
14
Input Capacitance, CKE pin
pF
Note)
1:VIH(max)=5.5V for pulse width less than 10ns.
2.VIL(min)=-1.0 for pulse width less than 10ns.
@1MHz
1.4V bias
200mV swing
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