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參數資料
| 型號： | MK41T56S00TR |
| 廠商： | 意法半導體 |
| 英文描述： | 512 bit 64b x8 Serial Access TIMEKEEPER SRAM |
| 中文描述： | 512位64B條x8串行SRAM的訪問計時器 |
| 文件頁數： | 10/15頁 |
| 文件大?。?/td> | 102K |
| 代理商： | MK41T56S00TR |
CLOCK CALIBRATION
(cont’d)
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125,829,120 actual oscillator cycles, that is
+ 4.068 or –2.034 ppm of adjustment per calibra-
tion step in the calibration register. Assuming that
the oscillator is in fact running at exactly 32,768 Hz,
each of the 31 increments in the Calibration byte
would represent 10.7 seconds per month.
Two methods are available for ascertaining how
much calibration a given MK41T56 may require.
The first involves simply setting the clock, letting it
run for a month and comparing it to a known
accurate reference (like WWV broadcasts). While
that may seem crude, it allows the designer to give
the end user the ability to calibrate his clock as his
environment may require, even after the final prod-
uct is packaged in a non-user serviceable enclo-
sure. All the designer has to do is provide a simple
utility that accessed the Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of
some test equipment. When the Frequency Test
(FT) bit, the seventh-most significant bit in the
Control Register, is set to a ’1’, and the oscillator is
running at 32,768 Hz, the FT/OUT pin of the device
will toggle at 512 Hz. Any deviation from 512 Hz
indicates the degree and direction of oscillator fre-
quency shift at the test temperature.
For example, a reading of 512.01024 Hz would
indicate a +20 ppm oscillator frequency error, re-
quiring a –10(XX001010) to be loaded into the
Calibration Byte for correction. Note that setting or
changing the Calibration Byte does not affect the
Frequency test output frequency.
OUTPUT DRIVER PIN
When the FT bit is not set, the FT/OUT pin becomes
an output driver that reflects the contents of D7 of
the control register. In other words, when D6 of
location 7 is a zero and D7 of location 7 is a zero
and then the FT/OUT pin will be driven low.
Note:
The FT/OUT pin is open drain which requires
an external pull-up resistor.
AI00594B
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
Figure 13. Clock Calibration
10/15
MK41T56, MKI41T56
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