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參數(shù)資料
| 型號： | MK5027 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | SS7 SIGNALLING LINK CONTROLLER |
| 中文描述： | 七號信令鏈路控制器 |
| 文件頁數(shù)： | 7/19頁 |
| 文件大?。?/td> | 183K |
| 代理商： | MK5027 |
All signal pins on the MK5027 are TTL compat-
ible. This has the advantage of making the
MK5027 in- dependent of the physical interface.
As shown in Figure 2. Iine drivers and receivers
are used for electrical- connectionto the physical
layer.
SERIAL INTERFACE
The MK5027 provides two separate serial chan-
nels: one for received data and one for transmit-
ted data. These serial channels are completely
separate and may be run at different clock fre-
quenciesThe receiver is responsiblefor recogniz-
ing frame boundries. removal of inserted zeroes
(for transparency) and checking the incoming
FCS. Signal units with in correct FCS values are
discarded. The receiver also parallelizes the in-
coming data which is placed into the receive data
buffers within the receive descriptor ring The
transmitter is responsiblefor framing and serializ-
ing the data frames placed in the transmit de-
scriptor ring. The transmitter calculates the FCS
of the outgoing data and appends it to the data
The transmitter generates flag sequences for in-
ter-signal unit fill, at least two flags are transmit-
ted between adjacent signal units. The FCS cal-
culations for
both
directions of serial data
optionally follow either the 16 bit CRC CCITT or
the 32-bit CRC32 algorithms FCS generationand
checkingcan also be optionallydisabled if neces-
sary.
MICROPROCESSOR INTERFACE
The MK5027 contains a dual channel DMA on
chip to handle data transfers to and from the host
mem-ory. Allaccess to the initializationblock and
descriptor rings is handled in this way The ad-
dress bus is 24 bits wide and does not use any
segmentation or paging methods. Data transfers
can optionally be 8 and 16 bit operations. this al-
lows easy interfacing with both 8 and 16 bit proc-
essors DMA transfers can be up to 1. 8 or an un-
limited number of words per transfer under
program control During bus slave operation the
MK5027 allows access to its 6 control/status reg-
isters which are used to monitor and control the
chip. These registers are used to control link pro-
cedures, configure interface options, control and
monitor interrupt status. and more. Bus slave
mode also allows both 8 and 16 bit accesses.
BUFFERMANAGEMENT
The basic organization of the buffer management
is a circular queue of tasks in memory called de-
scriptor rings. There are separate rings to de-
scribe the transmit and receive operations. Up to
128 buffers may be queued-up on a descriptor
ring awaiting execution by the MK5027 The de-
scriptor ring has a segment assigned to each
buffer. Each segment holds a pointer for the start-
ing address of the buffer. and holds a value for
the lengthof the buffer in bytes.
Each segment also contains two control bits
called OWNA and OWNB, which denote whether
the MK5027. the HOST. or the l/O ACCELERA-
TION PROCESSOR (if present) ”owns” the buff-
er. For transmit. when the MK5027owns the buff-
er. the MK5027 is allowed and commanded to
transmit the buffer When the MK5027 does not
own the buffer, it will not transmit that buffer. For
receive. when the MK5027 owns a buffer. it may
place received data into that buffer. Conversely.
when the MK5027 does
er, it will not place received datain that buffer.
The MK5027 buffer management mechanism will
handly signal units which are longer than the
length of an individual buffer. This is done by a
chaining method which utilizes multiple buffers.
The MK5027 tests the next segment in the de-
scriptor ring in a ”look ahead” manner. If the
packet is too long for one buffer, the next buffer-
will be used after filling the first buffer: that is,
”chained”. The MK5027 will then ”look ahead” to
the next buffer, and chain that buffer if necessary,
and so on The operational parameters for the
buffer management are defined by the user
in the initialization block The parameters defined
include the basic mode of operation. the number
of entries for the transmitter and receiver descrip-
tor rings.etc.
not own a receive buff-
MK5027
7/19
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相關(guān)代理商/技術(shù)參數(shù) |
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| MK5027DIP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SS7 SIGNALLING LINK CONTROLLER |
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