參數(shù)資料
型號: ML4841
廠商: Fairchild Semiconductor Corporation
英文描述: Variable Feedforward PFC/PWM Controller Combo(前饋可變PFC/PWM控制器組合芯片)
中文描述: 可變前饋式PFC / PWM控制器組合(前饋可變式PFC /脈寬調(diào)制控制器組合芯片)
文件頁數(shù): 8/15頁
文件大?。?/td> 149K
代理商: ML4841
ML4841
8
REV. 1.0 10/12/2000
FUNCTIONAL DESCRIPTION
(Continued)
Figure 2. Compensation Network Connections for the
Voltage and Current Error Amplifiers
and is illustrated in the Typical Performance
Characteristics.
The output of the voltage error amplifier, VEAO. The gain
modulator responds linearly to variations in this voltage.
The output of the gain modulator is a current signal, in the
form of a full wave rectified sinusoid at twice the line
frequency. This current is applied to the virtual-ground
(negative) input of the current error amplifier. In this way
the gain modulator forms the reference for the current
error loop, and ultimately controls the instantaneous
current draw of the PFC from the power line. The general
form for the output of the gain modulator is:
More exactly, the output current of the gain modulator is
given by:
(1)
where K is in units of V
-1
.
Note that the output current of the gain modulator is
limited to
200μA.
Current Error Amplifier
The current error amplifier’s output controls the PFC duty
cycle to keep the current through the boost inductor a
linear function of the line voltage. At the inverting input
to the current error amplifier, the output current of the
gain modulator is summed with a current which results
from a negative voltage being impressed upon the I
SENSE
pin (current into I
SENSE
V
SENSE
/3.5k
). The negative
voltage on I
SENSE
represents the sum of all currents
flowing in the PFC circuit, and is typically derived from a
current sense resistor in series with the negative terminal
of the input bridge rectifier. In higher power applications,
two current transformers are sometimes used, one to
monitor the I
D
of the boost MOSFET(s) and one to monitor
the I
F
of the boost diode. As stated above, the inverting
input of the current error amplifier is a virtual ground.
Given this fact, and the arrangement of the duty cycle
modulator polarities internal to the PFC, an increase in
positive current from the gain modulator will cause the
output stage to increase its duty cycle until the voltage on
I
SENSE
is adequately negative to cancel this increased
current. Similarly, if the gain modulator’s output
decreases, the output duty cycle will decrease, to
achieve a less negative voltage on the I
SENSE
pin.
There is a modest degree of gain contouring applied to the
transfer characteristic of the current error amplifier, to
increase its speed of response to current-loop
perturbations. However, the boost inductor will usually be
the dominant factor in overall current loop response.
Therefore, this contouring is significantly less marked than
15
VEAO
IEAO
VFB
IAC
VRMS
ISENSE
2.5V
-
+
16
2
4
3
VEA
-
+
IEA
+
-
VREF
VREF
1
PFC
OUTPUT
GAIN
MODULATOR
that of the voltage error amplifier. This is illustrated in the
Typical Performance Characteristics.
Cycle-By-Cycle Current Limiter
The I
SENSE
pin, as well as being a part of the current
feedback loop, is a direct input to the cycle-by-cycle
current limiter for the PFC section. Should the input
voltage at this pin ever be more negative than -1V, the
output of the PFC will be disabled until the protection
flip-flop is reset by the clock pulse at the start of the next
PFC power cycle.
Overvoltage Protection
The OVP comparator serves to protect the power circuit
from being subjected to excessive voltages if the load
should suddenly change. A resistor divider from the high
voltage DC output of the PFC is fed to V
FB
. When the
voltage on V
FB
exceeds 2.7V, the PFC output driver is shut
down. The PWM section will continue to operate. The
OVP comparator has 125mV of hysteresis, and the PFC
will not restart until the voltage at V
FB
drops below 2.58V.
The V
FB
should be set at a level where the active and
passive external power components and the ML4841 are
within their safe operating voltages, but not so low as to
interfere with the boost voltage regulation loop.
Error Amplifier Compensation
The PWM loading of the PFC can be modeled as a
negative resistor; an increase in input voltage to the PWM
causes a decrease in the input current. This response
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