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參數(shù)資料
| 型號： | ML6430 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Genlocking Sync Generator with Digital Audio Clock for NTSC, PAL & VGA(用于NTSC, PAL & VGA數(shù)字式音頻同步時鐘發(fā)生器) |
| 中文描述： | 同步鎖相同步發(fā)生器用于NTSC，PAL與數(shù)字音頻時鐘 |
| 文件頁數(shù)： | 6/33頁 |
| 文件大小： | 384K |
| 代理商： | ML6430 |
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ML6430/ML6431
6
GENLOCK PERFORMANCE SPECIFICATIONS
Unless otherwise noted, V
IN
= 1 V
PP
NTSC test signal for composite inputs, or 100% color bars for component (Note 1).
See Figure 1 for parameter measurement definition
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SYNC SEPARATION
Min Sync Amplitude
135
mV
Max Video Amplitude
3
V
Clamp timing error
NTC7 AC bounce signal (Note 2)
10
ns
Clamp Recovery TIme
NTC7 DC bounce signal (Note 3)
16
μs
CLOCK RECOVERY
Short Term Output Jitter Rejection
Input jitter = 50ns RMS
–15
dB
RMS Residual Output Clock Jitter
Input jitter <1ns RMS
600
ps
Peak to Peak (6
s
), Line to Line Jitter
Input Jitter < 1ns
2.0
2.2
ns
Head Switch Recovery Time to 1ns Error
5μs step H change on or before
line 1
4
lines
Step Frequency Recovery Time to 1ns Error
1% step H frequency change on or
before line 1
12
15
ms
Missing Sync Sensitivity
(Note 4)
1.0
ns
Sync Glitch Sensitivity
(Note 5)
1.0
ns
4X Clock Duty Cycle
C
LOAD
= 50pF, f
CLK4X
< 60MHz
40
60
%
2X Clock Duty Cycle
C
LOAD
= 50pF, f
CLK2X
< 30MHz
48
52
%
1X Clock Duty Cycle
C
LOAD
= 50pF, f
CLK1X
< 15MHz
48
52
%
Clock Skew — 1X to 2X
C
LOAD
= 50pF, f
CLK1X
< 15MHz
6
ns
Pulse Output Rise Time
C
LOAD
= 50pF
2
10
ns
Pulse Output Fall Time
C
LOAD
= 50pF
2
10
ns
Pulse Output Setup Time
C
LOAD
= 50pF
20
ns
Pulse Output Hold Time
C
LOAD
= 50pF
20
ns
SERIAL BUS
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT
Low Level Input Voltage
0
0.8
V
High Level Input Voltage
V
CC
– 0.8
V
CC
V
Low Level Input Current
V
IN
= 0V
1.0
m
A
High Level Input Current
V
IN
= V
CC
D
1.0
m
A
Input Impedance f
CLK
= 100kHz
1
M
W
Input Capacitance (C
IN
)
2
pF
SYSTEM TIMING
S
CLK
Frequency (f
CLOCK
)
100
kHz
Input Hysteresis (V
HYS
)
0.2
V
Spike Suppression (t
SPIKE
)
Max length for zero response
50
ns
Power Setup Time to Valid Data Inputs
VCC Settled to Within 1%
10
ms
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