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參數(shù)資料
| 型號： | ML6599 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Hot-Insertable Active SCSI Terminator(熱插入有源SCSI終端器) |
| 中文描述： | 熱可插入主動SCSI端接（熱插入有源的SCSI終端器） |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 83K |
| 代理商： | ML6599 |
ML6599
REV. 1.0 10/25/2000
5
connected to a device being hot-inserted/removed should
be inactive (accomplished by grounding the
DISCNKT
pin in the case of the ML6599). If the terminator being
inserted/removed were in the active state, at some point
in time the bus would be terminated by either 1 or 3
terminators. In either case, data integrity on the bus will
be compromised.
Figure 2 gives an application diagram showing a typical
SCSI bus configuration. To ensure proper operation, the
TERMPWR pin must be connected to the SCSI
TERMPOWER line. Each ML6599 requires parallel 0.1μF
and 10μF capacitors connected between the V
REF
and
GND pins and the TERMPOWER line needs a 10μF bypass
capacitor at each node in the system.
In an 8-bit wide SCSI bus arrangement (“A” Cable),
two ML6599s would be needed at each end of the SCSI
cable in order to terminate the 9 active signal lines.
16-bit wide SCSI would use three ML6599s, while 32-bit
wide SCSI bus would require five ML6599s.
In a typical SCSI subsystem, the open collector driver in
Figure 2. Application Diagram Showing Typical SCSI Bus Configuration with the ML6599
the SCSI transceiver pulls low when asserted. The
termination resistance serves as the pull-up when
negated. Figure 2 also shows a typical cable response to a
pulse. The receiving end of the cable will exhibit a single
time delay. When negated, the initial step will reach an
intermediate level (V
STEP
). With higher SCSI data rates,
sampling could occur during this step portion. In order to
get the most noise margin, the step needs to be as high as
possible to prevent false triggering. For this reason the
regulator voltage and the resistor defining the MOSFET
characteristic are trimmed to ensure that the I
O
is as close
as possible to the SCSI maximum current specification.
V
STEP
is defined as:
V
STEP
= V
OL
+ (I
O
∞
Z
O
)
where V
OL
is the driver output low voltage, I
O
is the
current from the receiving terminator, and Z
O
is the
characteristic impedance of the cable.
This is a very important characteristic that the terminator
helps to overcome by increasing the noise margin and
boosting the step as high as possible.
TERMPWR LINE
ML6599
TERMPWR
V
REF
GND
L9
L2 L1
DISCNKT
. . .
0.1μF
10μF
TERMPWR
V
REF
GND
L9
L1 L2
ML6599
DISCNKT
SCSI XCVR
SCSI XCVR
SCSI XCVR
V
REG
V
STEP
V
REG
t
D
t
D
LINE ASSERTED
LINE NEGATED
0.1μF
10μF
. . .
.
.
V
OL
SCSI CABLE
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