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ML66525 Family User’s Manual
Chapter 15
Interrupt Processing Functions
15 - 8
Table 15-3 lists the vector address and bit symbol for each maskable interrupt.
If multiple maskable interrupts are generated simultaneously, the lower vector address (in the
order of Table 15-3) is given priority and processed.
Similarly, for interrupts that have been
enabled, if the priority level is set and priority control enabled (MIPF = “1”), when multiple
maskable interrupts with the same priority are generated simultaneously, the lower vector
address is given priority and processed.
Table 15-3
Vector Addresses and Bit Symbols for Maskable Interrupts
Priority level
No.
Interrupt factor
Vector
address
[H]
Interrupt
request
Interrupt
enable
1
0
1
EXINT0 pin input (external interrupt 0)
000A
QINT0
EINT0
P1INT0
P0INT0
2
Timer 0 overflow
001A
QTM0OV
ETM0OV
P1TM0OV
P0TM0OV
3
EXINT1 pin input (external interrupt 1)
001C
QINT1
EINT1
P1INT1
P0INT1
4
EXINT2 pin input (external interrupt 2)
001E
QINT2
EINT2
P1INT2
P0INT2
5
EXINT3 pin input (external interrupt 3)
0020
QINT3
EINT3
P1INT3
P0INT3
6
Timer 3 overflow
0026
QTM3OV
ETM3OV
P1TM3OV
P0TM3OV
7
EXINT4 input (Vbus detect interrupt)
002A
QINT4
EINT4
P1INT4
P0INT4
8
EXINT5 input
(internal USB controller interrupt)
002C
QINT5
EINT5
P1INT5
P0INT5
9
EXINT6 input
(internal DMA controller interrupt)
002E
QINT6
EINT6
P1INT6
P0INT6
10
EXINT7 input
(internal Media controller interrupt)
0030
QINT7
EINT7
P1INT7
P0INT7
11
Timer overflow
0032
QTM7OV
ETM7OV
P1TM7OV
P0TM7OV
12
Timer 4 overflow
0036
QTM4OV
ETM4OV
P1TM4OV
P0TM4OV
13
SIO1 transmit buffer empty, transmit
complete, receive complete
0038
QSIO1
ESIO1
P1SIO1
P0SIO1
14
Timer 5 overflow
003A
QTM5OV
ETM5OV
P1TM5OV
P0TM5OV
SIO3 transmit-receive complete
003E
QSIO3
ESIO3
P1SIO3
P0SIO3
15
SIO6 transmit buffer empty, transmit
complete, receive complete
003E
QSIO6
ESIO6
P1SIO6
P0SIO6
16
SIO4 transfer complete
0040
QINT8
EINT8
P1INT8
P0INT8
17
Timer 6 overflow
0042
QTM6OV
ETM6OV
P1TM6OV
P0TM6OV
18
One cycle of A/D conversion scan
channels complete, A/D conversion
select mode complete
0044
QAD
EAD
P1AD
P0AD
19
EXINT8/EXINT9 pin input
(external interrupts 8, 9)
0046
QINT8
EINT8
P1INT8
P0INT8
20
Real-time counter output
(interval: 0.125 to 1 s)
0048
QRTC
ERTC
P1RTC
P0RTC
21
PWC0 overflow, match of PWC0 and
PWR0
006A
QPWM0
EPWM0
P1PWM0
P0PWM0
22
PWC1 overflow, match of PWC1 and
PWR1
006C
QPWM1
EPWM1
P1PWM1
P0PWM1
23
Timer 9 overflow
0072
QTM9OV
ETM9OV
P1TM9OV
P0TM9OV