參數(shù)資料
型號(hào)： ML67Q5002LA
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PBGA144
封裝： 11 X 11 MM, 0.80 MM PITCH, PLASTIC, LFBGA-144
文件頁(yè)數(shù)： 5/25頁(yè)
文件大小： 233K
代理商： ML67Q5002LA
FEDL675001-01
OKI Semiconductor
ML675001/67Q5002/67Q5003
12/24
Pin Name
I/O
Description
Primary
/
Secondary
Logic
DMA control signals
DREQ[0]
I
Ch 0 DMA request signal, used when DMA controller configured for
DREQ type
Secondary
Positive
DREQCLR[0]
O
Ch 0 DREQ signal clear request. The DMA device responds to this
output by negating DREQ.
Secondary
Positive
TCOUT[0]
O
Indicates to Ch 0 DMA device that last transfer has started.
Secondary
Positive
DREQ[1]
I
Ch 1 DMA request signal, used when DMA controller configured for
DREQ type
Secondary
Positive
DREQCLR[1]
O
Ch 1 DREQ signal clear request. The DMA device responds to this
output by negating DREQ.
Secondary
Positive
TCOUT[1]
O
Indicates to Ch 1 DMA device that last transfer has started
Secondary
Positive
UART
SIN
I
SIO receive signal
Secondary
Positive
SOUT
O
SIO transmit signal
Secondary
Positive
CTS
I
Clear To Send.
Indicates that modem or data set is ready to transfer data.
Bit 4 in
modem status register reflects this input.
Secondary
Negative
DSR
I
Data Set Ready.
Indicates that modem or data set is ready to establish a
communications link with UART.
Bit 5 in modem status register reflects this input.
Secondary
Negative
DCD
I
Data Carrier Detect.
Indicates that modem or data set has detected data carrier signal. Bit
7 in modem status register reflects this input.
Data Carrier Detect
Secondary
Negative
DTR
O
Data Terminal Ready.
Indicates that UART is ready to establish a communications link with
modem or data set. Bit 0 in modem control register controls this
output.
Secondary
Negative
RTS
O
Request To Send.
Indicates that UART is ready to transfer data to modem or data set. Bit
1 in modem control register controls this output.
Secondary
Negative
RI
I
Ring Indicator. Indicates that modem or data set has received
telephone ring indicator. Bit 6 in modem status register reflects this
input.
Secondary
Negative
SIO
STXD
O
SIO transmit signal
Secondary
Positive
SRXD
I
SIO receive signal
Secondary
Positive
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