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參數(shù)資料
| 型號： | ML9042 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | DOT MATRIX LCD CONTROLLER DRIVER |
| 中文描述： | 點(diǎn)陣LCD控制器驅(qū)動(dòng) |
| 文件頁數(shù)： | 30/58頁 |
| 文件大?。?/td> | 558K |
| 代理商： | ML9042 |
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FEDL9042-01
OKI Semiconductor
ML9042-xx
30/58
Instruction Codes
Table of Instruction Codes
Code
Instruction
RS
1
RS
/
CSB
RW/
SI
DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
(SO)
Function
Execution
Time
f = 270 kHz
Display Clear
1
0
0
0
0
0
0
0
0
0
1
Clears all the displayed digits of the
LCD and sets the DDRAM address 00
in the address counter. The arbitrator
data is cleared.
Sets the DDRAM address 00 in the
address counter and shifts the display
back to the original. The content of the
DDRAM remains unchanged.
Determines the direction of movement
of the cursor and whether or not to shift
the display. This instruction is
executed when data is written or read.
Sets LCD display ON/OFF (D), cursor
ON/OFF (C) or cursor-position
character blinking ON/OFF (B).
Moves the cursor or shifts the display
without changing the content of the
DDRAM.
Sets the interface data length (DL), the
number of display lines (N), the
arbitrator display (ABE), the segment
data shift direction (SSR), or the
common data shift direction (CSR).
Sets on CGRAM address. After that,
CGRAM data is transferred to and from
the CPU.
Sets a DDRAM address. After that,
DDRAM data is transferred to and from
the CPU.
Reads the Busy Flag (indicating that
the ML9042 is operating) and the
content of the address counter.
Writes data in DDRAM, ABRAM or
CGRAM.
Reads data from DDRAM, ABRAM or
CGRAM.
1.52 ms
Cursor Home
1
0
0
0
0
0
0
0
0
1
X
1.52 ms
Entry Mode
Setting
1
0
0
0
0
0
0
0
1
I/D
S
37
μ
s
Display
0
0
0
0
0
0
1
D
C
B
37
μ
s
Cursor/Display
Shift
1
0
0
0
0
0
1
S/C R/L
X
X
37
μ
s
Function Setting 1
0
0
0
0
1
DL
N ABE SSR CSR
37
μ
s
CGRAM
Address Setting
1
0
0
0
1
ACG
37
μ
s
DDRAM
Address Setting
1
0
0
1
ADD
37
μ
s
Busy Flag/
Address Read
1
0
1
BF
ADC
0
μ
s
RAM Data Write 1
1
0
WRITE DATA
37
μ
s
RAM Data Read 1
1
1
READ DATA
37
μ
s
Arbitrator
Display Line Set
0
0
0
0
0
0
0
0
0
1
AS Sets the arbitrator display line.
37
μ
s
ABRAM
Address Setting
0
0
0
0
1
1
AAB
Sets an ABRAM address. After that,
ABRAM data is transferred to and from
the CPU.
37
μ
s
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