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參數資料
| 型號： | ML9042 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | DOT MATRIX LCD CONTROLLER DRIVER |
| 中文描述： | 點陣LCD控制器驅動 |
| 文件頁數： | 35/58頁 |
| 文件大?。?/td> | 558K |
| 代理商： | ML9042 |
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FEDL9042-01
OKI Semiconductor
ML9042-xx
35/58
N
ABE
Number of
display lines
1
1
2
2
Font size
Duty
Number of
biases
4
4
5
5
Number of
common signals
8
9
16
17
0
0
1
1
0
1
0
1
5
×
8
5
×
8
5
×
8
5
×
8
1/8
1/9
1/16
1/17
Note: The execution time of this instruction is 37
μ
s at an oscillation frequency (OSC) of 270
kHz.
7) CGRAM Address Setting
RS
1
1
RS
0
0
R/
W
0
DB
7
0
DB
6
1
DB
5
C
5
DB
4
C
4
DB
3
C
3
DB
2
C
2
DB
1
C
1
DB
0
C
0
Instruction code:
This instruction sets the CGRAM address to the data represented by the bits C
5
to C
0
(binary).
The CGRAM addresses are valid until DDRAM or ABRAM addresses are set.
The CPU writes or reads character patterns starting from the one represented by the CGRAM address bits C
5
to
C
0
set in the instruction code at that time.
8) DDRAM Address Setting
Note: The execution time of this instruction is 37
μ
s at an oscillation frequency (OSC) of 270 kHz.
RS
1
1
RS
0
0
R/
W
0
DB
7
1
DB
6
D
6
DB
5
D
5
DB
4
D
4
DB
3
D
3
DB
2
D
2
DB
1
D
1
DB
0
D
0
Instruction code:
This instruction sets the DDRAM address to the data represented by the bits D
6
to D
0
(binary).
The DDRAM addresses are valid until CGRAM or ABRAM addresses are set.
The CPU writes or reads character codes starting from the one represented by the DDRAM address bits D
6
to
D
0
set in the instruction code at that time.
In the 1-line mode (the “N” bit is “0”), the DDRAM address represented by bits D
6
to D
0
(binary) should be in
the range “00” to “4F” in hexadecimal.
In the 2-line mode (the “N” bit is “1”), the DDRAM address represented by bits D
6
to D
0
(binary) should be in
the range “00” to “27” or “40” to “67” in hexadecimal.
If an address other than above is input, the ML9042 cannot properly write a character code in or read it from the
DDRAM.
9) DDRAM/ABRAM/CGRAM Data Write
Note: The execution time of this instruction is 37
μ
s at an oscillation frequency (OSC) of 270 kHz.
RS
1
1
RS
0
1
R/
W
0
DB
7
E
7
DB
6
E
6
DB
5
E
5
DB
4
E
4
DB
3
E
3
DB
2
E
2
DB
1
E
1
DB
0
E
0
Instruction code:
A character code (E
7
to E
0
) is written to the DDRAM, Display-ON data (E
7
to E
0
) to the ABRAM or a character
pattern (E
7
to E
0
) to the CGRAM.
The DDRAM, ABRAM or CGRAM is selected at the preceding address setting.
After data is written, the address counter (ADC) is incremented or decremented as set by the Entry Mode
Setting instruction (see 3).
Note: The execution time of this instruction is 37
μ
s at an oscillation frequency (OSC) of 270 kHz.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ML9042-54CVWA-5016 | 制造商:ROHM Semiconductor 功能描述:RHOML9042-54CVWA-5016 OKI LCD DRIVER |
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| ML9044A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A-XXACVWA | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A-XXBCVWA | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
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