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參數(shù)資料
| 型號： | ML9092-04 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | LCD Driver with Key Scanner and RAM |
| 中文描述： | 液晶顯示驅(qū)動器，掃描器和RAM的關(guān)鍵 |
| 文件頁數(shù)： | 46/66頁 |
| 文件大?。?/td> | 659K |
| 代理商： | ML9092-04 |
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FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
46/66
Port register C (PTC) set
D7
—
—: don’t care
The port register C set instruction sets the output of port C. (Applies to the ML9092-01 only.)
This register is enabled when a “L” level is applied to the KPS pin of ML9092-01 and the R0/C0 to R4/C4 pins are
set as port C.
When each bit of PTC4 to PTC0 is set to “1”, a “H” level is output from each of the R4/C4 to R0/C0 pins of the
general purpose port C. In the same way, when each bit of PTC4 to PTC0 is set to “0”, a “H” level is output from
each of the R4/C4 to R0/C0 pins. If the
RESET
pin is pulled to a “L” level, the PE bit (bit D2) of the control
register is reset to “0”, this register is reset to “0”, and the R4/C4 to R0/C0 pins go to high impedance.
After the reset state is released, if the PTC4 to PTC0 bits of this register are set to “1” or “0” and then the PE bit is
set to “1”, the R4/C4 to R0/C0 pins are released from its high impedance state and a “H” or “L” level that
corresponds to the set status of each bit of PTC4 to PTC0, is output from the R4/C4 to R0/C0 pins.
Port register D (PTD) set
D7
D6
D5
D4
—
—
—
PTD4
—: don’t care
The port register D set instruction sets the output of port D. (Applies to the ML9092-01 only.)
This register is enabled when a “L” level is applied to the KPS pin of ML9092-01 and the C0/D0 to C4/D4 pins are
set as port C.
When each bit of PTD4 to PTD0 is set to “1”, a “H” level is output from each of the C4/D4 to C0/D0 pins of the
general purpose port D. In the same way, when each bit of PTD4 to PTD0 is set to “0”, a “H” level is output from
each of the C4/D4 to C0/D0 pins. If the
RESET
pin is pulled to a “L” level, the PE bit (bit D2) of the control
register is reset to “0”, this register is reset to “0”, and the C4/D4 to C0/D0 pins go to high impedance.
After the reset state is released, if the PTD4 to PTD0 bits of this register are set to “1” or “0” and then the PE bit is
set to “1”, the C4/D4 to C0/D0 pins are released from its high impedance state and a “H” or “L” level that
corresponds to the set status of each bit of PTD4 to PTD0, is output from the C4/D4 to C0/D0 pins.
Control register 1 (FCR1)
D7
D6
D5
D4
INC
WLS
KT
SHL
(1) D7 (INC) Address increment direction
1: X direction address increment
0: Y direction address increment
This bit sets the address increment direction of the display RAM. The display RAM address is automatically
incremented by 1 every time data is written to the display data register. Writing a “1” to this bit sets “X address
increment,” and writing a “0” sets “Y address increment.” For further details regarding address incrementing,
refer to the page entitled “X, Y Address Counter Auto Increment.” This bit is set to “1” if the
RESET
pin is pulled
to a “L” level.
D6
—
D5
—
D4
PTC4
D3
PTC3
D2
PTC2
D1
PTC1
D0
PTC0
D3
PTD3
D2
PTD2
D1
PTD1
D0
PTD0
D3
BE
D2
PE
D1
DTY1
D0
DTY0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML9092-04TB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:LCD Driver with Key Scanner and RAM |
| ML9093F | 制造商:Ohmite Mfg Co 功能描述: |
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| ML914 | 制造商:AEMC Instruments 功能描述:DATA LOGGER, 100A-1000AAC, 4CH; Input Voltage:- ;RoHS Compliant: NA |
| ML9203 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:5 x 7 Dot Character x 16-Digit x 2-Line Display Controller/Driver with Character RAM |
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