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| 型號(hào)： | MM912H634CV1AE |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 18/349頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 64KS12 LIN2XLS/HS ISENSE |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 應(yīng)用： | 自動(dòng) |
| 核心處理器： | HCS12 |
| 程序存儲(chǔ)器類型： | 閃存（64 kB） |
| 控制器系列： | HCS12 |
| RAM 容量： | 6K x 8 |
| 接口： | LIN |
| 電源電壓： | 5.5 V ~ 27 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP 裸露焊盤(pán) |
| 包裝： | 管件 |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP 裸露焊盤(pán)（7x7） |
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Serial Communication Interface (S08SCIV4)
MM912_634 Advance Information, Rev. 10.0
Freescale Semiconductor
114
5.16.3
Functional Description
The SCI allows full-duplex, asynchronous, NRZ serial communication among the MCU and remote devices, including other
MCUs. The SCI comprises a baud rate generator, transmitter, and receiver block. The transmitter and receiver operate
independently, although they use the same baud rate generator. During normal operation, the MCU monitors the status of the
SCI, writes the data to be transmitted, and processes received data. The following describes each of the blocks of the SCI.
5.16.3.1
Baud Rate Generation
As shown in Figure 31, the clock source for the SCI baud rate generator is the D2D clock.
Figure 31. SCI Baud Rate Generation
SCI communications require the transmitter and receiver (which typically derive baud rates from independent clock sources) to
use the same baud rate. Allowed tolerance on this baud frequency depends on the details of how the receiver synchronizes to
the leading edge of the start bit and how bit sampling is performed.
The MCU resynchronizes to bit boundaries on every high-to-low transition, but in the worst case, there are no such transitions in
the full 10- or 11-bit time character frame so any mismatch in baud rate is accumulated for the whole character time. For a
Freescale Semiconductor SCI system whose bus frequency is driven by a crystal, the allowed baud rate mismatch is about ±4.5
percent for 8-bit data format and about ±4.0 percent for 9-bit data format. Although baud rate modulo divider settings do not
always produce baud rates that exactly match standard rates, it is normally possible to get within a few percent, which is
acceptable for reliable communications.
5.16.3.2
Transmitter Functional Description
This section describes the overall block diagram for the SCI transmitter, as well as specialized functions for sending break and
idle characters. The transmitter block diagram is shown in Figure 29.
The transmitter output (TxD) idle state defaults to logic high (TXINV = 0 following reset). The transmitter output is inverted by
setting TXINV = 1. The transmitter is enabled by setting the TE bit in SCIC2. This queues a preamble character that is one full
character frame of the idle state. The transmitter then remains idle until data is available in the transmit data buffer. Programs
store data into the transmit data buffer by writing to the SCI data register (SCID).
The central element of the SCI transmitter is the transmit shift register that is either 10 or 11 bits long depending on the setting
in the M control bit. For the remainder of this section, we will assume M = 0, selecting the normal 8-bit data mode. In 8-bit data
mode, the shift register holds a start bit, eight data bits, and a stop bit. When the transmit shift register is available for a new SCI
character, the value waiting in the transmit data register is transferred to the shift register (synchronized with the baud rate clock)
and the transmit data register empty (TDRE) status flag is set to indicate another character may be written to the transmit data
buffer at SCID.
If no new character is waiting in the transmit data buffer after a stop bit is shifted out the TxD pin, the transmitter sets the transmit
complete flag and enters an idle mode, with TxD high, waiting for more characters to transmit.
Writing 0 to TE does not immediately release the pin to be a general-purpose I/O pin. Any transmit activity that is in progress
must first be completed. This includes data characters in progress, queued idle characters, and queued break characters.
5.16.3.2.1
Send Break and Queued Idle
The SBK control bit in SCIC2 is used to send break characters which were originally used to gain the attention of old teletype
receivers. Break characters are a full character time of logic 0 (10 bit times including the start and stop bits). A longer break of
13 bit times can be enabled by setting BRK13 = 1. Normally, a program would wait for TDRE to become set to indicate the last
character of a message has moved to the transmit shifter, then write 1 and then write 0 to the SBK bit. This action queues a break
character to be sent as soon as the shifter is available. If SBK is still 1 when the queued break moves into the shifter
SBR12:SBR0
DIVIDE BY
Tx BAUD RATE
Rx SAMPLING CLOCK
(16 BAUD RATE)
BAUD RATE GENERATOR
OFF IF [SBR12:SBR0] = 0
D2D
BAUD RATE =
BUSCLK
[SBR12:SBR0] 16
16
MODULO DIVIDE BY
(1 THROUGH 8191)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 345-026-527-802 | CARDEDGE 26POS DUAL .100 GREEN |
| 345-026-527-801 | CARDEDGE 26POS DUAL .100 GREEN |
| MM912G634CV1AER2 | IC 48KS12 LIN2XLS/HS ISENSE |
| 345-026-527-204 | CARDEDGE 26POS DUAL .100 GREEN |
| 345-026-527-202 | CARDEDGE 26POS DUAL .100 GREEN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM912H634CV1AER2 | 功能描述:LIN 收發(fā)器 64KS12 LIN2xLS/HS Isense RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| MM912H634DM1AE | 功能描述:16位微控制器 - MCU 64KS12 LIN2XLS/HS ISENSE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MM912H634DM1AER2 | 功能描述:16位微控制器 - MCU 64KS12 LIN2XLS/HS ISENSE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MM912H634DV1AE | 功能描述:16位微控制器 - MCU 64KS12 LIN2XLS/HS ISENSE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MM912H634DV1AER2 | 功能描述:16位微控制器 - MCU 64KS12 LIN2XLS/HS ISENSE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
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