
Chapter 7
16-bit Timers
VII - 12
Control Registers
Figure 7-2-21
Timer 7 Input Capture Register Lower 8 bits (TM7ICL : x'03F76', R)
nTimer 7 Input Capture Register (TM7IC)
Figure 7-2-22
Timer 7 Input Capture Register Upper 8 bits (TM7ICH : x'03F77', R)
Input capture register is a register that holds the value loaded from a binary counter by a capture trigger.
A capture trigger is generated by an input signal from an external interrupt pin, and when an arbitrary
value is written to an input capture register (Directly writing to the register by program is disabled.).
76543210
( At reset : X X X X X X X X )
TM7ICL
TM7ICL7 TM7ICL6 TM7ICL5 TM7ICL4 TM7ICL3 TM7ICL2 TM7ICL1 TM7ICL0
76543210
( At reset : X X X X X X X X )
TM7ICH
TM7ICH7 TM7ICH6 TM7ICH5 TM7ICH4 TM7ICH3 TM7ICH2 TM7ICH1 TM7ICH0
nTimer 8 Input Capture Register (TM8IC)
76543210
( At reset : X X X X X X X X )
TM8ICL
TM8ICL7 TM8ICL6 TM8ICL5 TM8ICL4 TM8ICL3 TM8ICL2 TM8ICL1 TM8ICL0
76543210
( At reset : X X X X X X X X )
TM8ICH
TM8ICH7 TM8ICH6 TM8ICH5 TM8ICH4 TM8ICH3 TM8ICH2 TM8ICH1 TM8ICH0
Figure 7-2-23
Timer 8 Input Capture Register Lower 8 bits (TM8ICL : x'03F86', R)
Figure 7-2-24
Timer 8 Input Capture Register Upper 8 bits (TM8ICH : x'03F87', R)
nTimer 7 Dead Time Preset Register (TM7DEADPR)
Figure 7-2-25
Timer 7 Dead Time Preset Register (TM7DEADPR : x'03F7E', W/R)
76543210
( At reset : X X X X X X X X )
TM7DEADPR TM7DEADPR7 TM7DEADPR6 TM7DEADPR5 TM7DEADPR4 TM7DEADPR3 TM7DEADPR2 TM7DEADPR1 TM7DEADPR0
Timer 7 dead timer preset register is 8-bit registers that set the dead time.
If data is written while counting is halted, the value of the timer 7 dead time preset register is loaded into
the dead time circuit. And if data is written during counting, TM70C1 and TM70C2 compare matching is
occurred. In correspond to these matching, data of the timer 7 dead time preset register is loaded to the
dead time generation circuit.