MPC512
5
Micr
ocontr
o
lle
rData
Sheet
Data
Sheet,
Re
v
.3
Pi
n
Assig
n
ments
Fre
e
scale
Semico
nductor
18
EMB_AD05
0x27
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD05/NFC_AD05
—
RST_CONF_COREPLL6
—
LPC
—
I/O
—
VDD_IO
ALT3: Reset configuration
Core PLL Multiplication
Factor 0
B2
EMB_AD06
0x26
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD06/NFC_AD06
—
RST_CONF_COREPLL5
—
LPC
—
I/O
—
VDD_IO
ALT3: Reset configuration
Core PLL Multiplication
Factor 1
C4
EMB_AD07
0x25
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD07/NFC_AD07
—
RST_CONF_COREPLL4
—
LPC
—
I/O
—
VDD_IO
ALT3: Reset configuration
Core PLL Multiplication
Factor 2
C3
EMB_AD08
0x24
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD08/NFC_AD08
PSC3_2
RST_CONF_SPMF0
GPIO28
LPC
PSC3
GPIO1
I/O
VDD_IO
ALT3: Reset configuration
System PLL Multiplication
Factor 0
E4
EMB_AD09
0x23
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD09/NFC_AD09
PSC3_1
RST_CONF_SPMF1
GPIO27
LPC
PSC3
GPIO1
I/O
VDD_IO
ALT3: Reset configuration
System PLL Multiplication
Factor 1
C2
EMB_AD10
0x22
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD10/NFC_AD10
PSC3_0
RST_CONF_SPMF2
GPIO26
LPC
PSC3
GPIO1
I/O
VDD_IO
ALT3: Reset configuration
System PLL Multiplication
Factor 2
D2
EMB_AD11
0x21
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD11/NFC_AD11
PSC2_4
RST_CONF_SPMF3
GPIO25
LPC
PSC2
GPIO1
I/O
VDD_IO
ALT3: Reset configuration
C1
EMB_AD12
0x20
STD_PU
ALT0
ALT1
ALT2
ALT3
LPC_AD12/NFC_AD12
PSC2_3
RST_CONF_PREDIV0
GPIO24
LPC
PSC2
GPIO1
I/O
VDD_IO
ALT3: Reset configuration
E3
Table 2. MPC5125 Pin Multiplexing (continued)
Pin
Pad I/O
Control
Register1
and Offset2
Alternate
Function3
Functions4
Peripheral5
I/O
Direction
Power Domain
Notes
Pin