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參數(shù)資料
| 型號： | MPC8241TZQ166D |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 53/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT 166MHZ 357-PBGA |
| 標(biāo)準(zhǔn)包裝： | 44 |
| 系列： | MPC82xx |
| 處理器類型： | 32-位 MPC82xx PowerQUICC II |
| 速度： | 166MHz |
| 電壓： | 1.8V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 357-BBGA |
| 供應(yīng)商設(shè)備封裝： | 357-PBGA（25x25） |
| 包裝： | 托盤 |
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MPC8241 Integrated Processor Hardware Specifications, Rev. 10
Freescale Semiconductor
57
Document Revision History
1
—
Updated document template.
Section 1.4.1.5—Updated driver type names in Table 4 so that they are consistent with the driver
types referred to in the MPC8245 Integrated Processor Reference Manual. Added notes 5 and 6 to
Table 4.
Section 1.4.3.1—Added reference to AN2164 in note 7. Labeled N value in Figures 5 through 8.
Section 1.4.3.2—Updated Figure 9 to show Tos.
Table 9—Changed default for 0x77 bits 5:4 to 0b10.
Section 1.4.3.3—Added item 12e to Table 10 for SDRAM_SYNC_IN to Output Valid Timing.
Updated Figure 13 to state GVDD_OVDD instead of OVDD.
Section 1.5.3—Updated driver type names to match those used in Table 4. Updated notes for the
following signals: DRDY, SDRAM_CLK[0:3], MIV, RTC, TDO, and DA[11].
Section 1.6—Updated PLL table and notes.
Removed old Section 1.7.2 on voltage sequencing requirements. Added cautions regarding voltage
sequencing to the end of Table 2 in Section 1.4.1.2.
Section 1.7.3—Changed sentence recommendation regarding decoupling capacitors.
Section 1.7.5—Added reference to AN2164.
Section 1.7.6—Added sentence regarding the PLL_CFG signals.
Removed old Section 1.7.8 since the MPC8241 cannot be used as a drop in replacement for the
MPC8240 because of pin compatibility issues.
Section 1.7.8—Updated TRST information in this section and Figure 26.
Section 1.7.9—Updated list for heat sink and thermal interface vendors.
Section 1.9—Changed format of ordering information section. Added tables to reflect part number
specifications also available.
Added Sections 1.9.2 and 1.9.3.
0.3
—
Corrected solder ball information in Section 1.5.1 to 62 Sn/36 Pb/2 Ag.
Section 1.4.3.1—Corrected DLL_EXTEND labeling in Figures 5 through 8. Removed note for pin
TRIG_OUT/RCS3 in Table 16, as well as from the list of pins needing to be pulled up to IVDD in
Section 1.7.6.
Corrected order information labeling in Section 1.9 to MPC8241XZPXXXX. Also corrected label
description of ZU = PBGA to ZP = PBGA.
0.2
—
Table 16—Corrected pin number for PLL_CFG0/DA10 to N3. The pin was already correctly listed for
DA10/PLL_CFG0. Updated note 1 to reflect pin assignments for the MPC8241.
Updated footnotes throughout document.
Section 1.4.3.3—Updated note 4 to correct bit values of PCI_HOLD_DEL in PMCR2.
Section 1.6—Updated notes in Table 17. Included memory VCO minimum and maximum numbers.
Section 1.7.8—Updated description of bits PCI_HOLD_DEL in PMCR2.
Section 1.7.10.3—Replaced thermal characterization parameter (YJT) with correct thermal
characterization parameter (
ψJT). Changed ψπ symbol to ψJT.
0.1
—
Updated Features list in Section 1.2.
Corrected pin assignments in Table 16 for DA[15] and DQM[3] signals.
Added vendor (Cool Innovations, Inc.) to list of heat sink vendors.
0
—
Initial release.
Table 21. Revision History Table (continued)
Revision
Date
Substantive Change(s)
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