MOTOROLA
MPC8245 Integrated Processor Hardware Specications
57
Ordering Information
1.9
Ordering Information
Ordering information for the parts fully covered by this specication document is provided in
Section 1.9.1,This Document,” lists the part numbers which do not fully conform to the specications of this document.
These special part numbers require an additional document called a part number specication.
1.9.1
Part Numbers Fully Addressed by This Document
Table 21 provides the Motorola part numbering nomenclature for the MPC8245. Note that the individual
part numbers correspond to a maximum processor core frequency. For available frequencies, contact your
local Motorola sales ofce. In addition to the processor frequency, the part numbering scheme also includes
an application modier which may specify special application conditions. Each part number also contains
1
Updated document template.
Section 1.4.1.4
—Changed the driver type names in Table 6 to match with the names used in the MPC8245
User’s Manual.
Section 1.5.3
—Updated driver type names for signals in Table 16 to match with names used in the
MPC8245 Integrated Processor User’s Manual.
Section 1.4.1.2
—Updated Table 7 to refer to new PLL Tables for VCO limits.
Section 1.4.3.3
—Added item 12e to Table 10 for SDRAM_SYNC_IN to Output Valid timing.
Section 1.5.1
—Updated Solder Balls information to 62Sn/36PB/2Ag.
Section 1.6
—Updated PLL Tables 17 and 18 and appropriate notes to reect changes of VCO ranges for
memory and CPU frequencies.
Section 1.7—Updated voltage sequencing requirements in Table 2 and removed Section 1.7.2.
Section 1.7.8—Updated TRST inforrmation and Figure 26.
New Section 1.7.2—Updated the range of I/O power consumption numbers for OVDD and GVDD to correct
values as in Table 5. Updated fastest frequency combination to 66:100:350 MHz.
Section 1.7.9—Updated list for Heat Sink and Thermal Interface vendors.
Section 1.9—Changed format of Ordering Information section. Added tables to reflect part number
specifications also available.
Added Sections 1.9.2 and 1.9.3.
2
Globally changed EPIC to PIC.
Section 1.4.1.4
—Note 5: Changed register reference from 0x72 to 0x73.
Section 1.4.1.5
—Table 5: Updated power dissipation numbers based on latest characterization data.
Section 1.4.2
—Table 6: Updated table to show more thermal specications.
Section 1.4.3
—Table 7: Updated minimum memory bus value to 50 MHz.
Section 1.4.3.1
—Changed equations for DLL locking range based on characterization data. Added updates
and reference to AN2164 for note 6. Added table dening Tdp parameters. Labeled N value in Figures 5
through 8.
Section 1.4.3.2
—Table 10: Changed bit denitions for tap points. Updated note on T
os and added reference
to AN2164 for note 7. Updated Figure 9 to show signicance of Tos.
Section 1.4.3.4—Added column for SDRAM_CLK @ 133 MHz
Sections 1.5.1 and 1.5.2—Corrected packaging information to state TBGA packaging.
Section 1.5.3—Corrected some signals in Table 16 which were missing overbars in the Rev 1.0 release of
the document.
Section 1.6—Updated note 10 of Tables 18 and 19.
Section 1.7.3
—Changed sentence recommendation regarding decoupling capacitors.
Section 1.9
—Updated format of tables in Ordering Information section.
Table 20. Revision History Table (continued)
Rev. No.
Substantive Change(s)