參數(shù)資料
型號: MPC8306CVMADDCA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA369
封裝: 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-369
文件頁數(shù): 71/76頁
文件大?。?/td> 474K
代理商: MPC8306CVMADDCA
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
Freescale Semiconductor
73
Ordering Information
Table 62 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,
nominal OVDD, 105C.
24.5
Configuration Pin Multiplexing
The MPC8306 provides the user with power-on configuration options which can be set through the use of
external pull-up or pull-down resistors of 4.7 k
on certain output pins (Refer to the “Reset, Clocking
and Initialization” of MPC8306S PowerQUICC II Pro Integrated Communications Processor Family
Reference Manual). These pins are generally used as output only pins in normal operation.
While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins
while HRESET is asserted, is latched when HRESET deasserts, at which time the input receiver is disabled
and the I/O circuit takes on its normal function. Careful board layout with stubless connections to these
pull-up/pull-down resistors coupled with the large value of the pull-up/pull-down resistor should minimize
the disruption of signal quality or speed for output pins thus configured.
25 Ordering Information
This section presents ordering information for the devices discussed in this document, and it shows an
example of how the parts are marked. Ordering information for the devices fully covered by this document
25.1
Part Numbers Fully Addressed by This Document
Table 63 provides the Freescale part numbering nomenclature for the MPC8306 family. Note that the
individual part numbers correspond to a maximum processor core frequency. For available frequencies,
contact your local Freescale sales office. In addition to the maximum processor core frequency, the part
numbering scheme also includes the maximum effective DDR memory speed and QUICC Engine bus
frequency. Each part number also contains a revision code which refers to the die mask revision number.
Table 62. Impedance Characteristics
Impedance
Local Bus, Ethernet, DUART, Control,
Configuration and Power Management
DDR DRAM
Symbol
Unit
RN
42 Target
20 Target
Z0
RP
42 Target
20 Target
Z0
Differential
NA
ZDIFF
Note:
Nominal supply voltages. See Table 1, Tj = 105C.
相關(guān)PDF資料
PDF描述
MPC8308CZQAGD 32-BIT, 266 MHz, MICROPROCESSOR, PBGA473
MPC8308CZQADD 32-BIT, 266 MHz, MICROPROCESSOR, PBGA473
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