參數(shù)資料
型號(hào): MPC8313CZQAFFB
廠商: Freescale Semiconductor
文件頁數(shù): 16/99頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC II PRO 516PBGA
標(biāo)準(zhǔn)包裝: 40
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 333MHz
電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
封裝/外殼: 516-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 516-PBGAPGE(27x27)
包裝: 托盤
配用: MPC8313E-RDB-ND - BOARD PROCESSOR
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
23
8.2
MII, RGMII, and RTBI AC Timing Specifications
The AC timing specifications for MII, RMII, RGMII, and RTBI are presented in this section.
8.2.1
MII AC Timing Specifications
This section describes the MII transmit and receive AC timing specifications.
8.2.1.1
MII Transmit AC Timing Specifications
This table provides the MII transmit AC timing specifications.
Output high voltage
VOH
IOH = –1.0 mA
LVDDA or LVDDB = Min
2.00
LVDDA + 0.3
or
LVDDB + 0.3
V
Output low voltage
VOL
IOL = 1.0 mA
LVDDA or LVDDB = Min
VSS– 0.3
0.40
V
Input high voltage
VIH
—LVDDA or LVDDB = Min
1.7
LVDDA + 0.3
or
LVDDB + 0.3
V
Input low voltage
VIL
—LVDDA or LVDDB = Min
–0.3
0.70
V
Input high current
IIH
VIN
1 = LV
DDA or LVDDB
—10
A
Input low current
IIL
VIN
1 = V
SS
–15
A
Note:
1. Note that the symbol VIN, in this case, represents the LVIN symbol referenced in Table 1 and Table 2.
Table 26. MII Transmit AC Timing Specifications
At recommended operating conditions with LVDDA/LVDDB/NVDD of 3.3 V ± 0.3 V.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
TX_CLK clock period 10 Mbps
tMTX
—400
ns
TX_CLK clock period 100 Mbps
tMTX
—40—
ns
TX_CLK duty cycle
tMTXH/tMTX
35
65
%
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
tMTKHDX
1
5
15
ns
TX_CLK data clock rise VIL(min) to VIH(max)
tMTXR
1.0
4.0
ns
TX_CLK data clock fall VIH(max) to VIL(min)
tMTXF
1.0
4.0
ns
Note:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMTKHDX symbolizes MII transmit
timing (MT) for the time tMTX clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in general,
the clock reference symbol representation is based on two to three letters representing the clock of a particular functional.
For example, the subscript of tMTX represents the MII(M) transmit (TX) clock. For rise and fall times, the latter convention is
used with the appropriate letter: R (rise) or F (fall).
Table 25. RGMII/RTBI DC Electrical Characteristics (continued)
Parameters
Symbol
Conditions
Min
Max
Unit
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