參數(shù)資料
型號(hào)： MPC8313CZQAFFB
廠商： Freescale Semiconductor
文件頁數(shù)： 67/99頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC II PRO 516PBGA
標(biāo)準(zhǔn)包裝： 40
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 333MHz
電壓： 0.95 V ~ 1.05 V
安裝類型： 表面貼裝
封裝/外殼： 516-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 516-PBGAPGE（27x27）
包裝： 托盤
配用： MPC8313E-RDB-ND - BOARD PROCESSOR
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
7
2.1
Overall DC Electrical Characteristics
This section covers the ratings, conditions, and other characteristics.
2.1.1
Absolute Maximum Ratings
This table provides the absolute maximum ratings.
2.1.2
Power Supply Voltage Specification
This table provides the recommended operating conditions for the MPC8313E. Note that the values in this
table are the recommended and tested operating conditions. If a particular block is given a voltage falling
within the range in the Recommended Value column, the MPC8313E is capable of delivering the amount
of current listed in the Current Requirement column; this is the maximum current possible. Proper device
operation outside of these conditions is not guaranteed.
Table 1. Absolute Maximum Ratings1
Characteristic
Symbol
Max Value
Unit
Note
Core supply voltage
VDD
–0.3 to 1.26
V
—
PLL supply voltage
AVDD
–0.3 to 1.26
V
—
Core power supply for SerDes transceivers
XCOREVDD
–0.3 to 1.26
V
—
Pad power supply for SerDes transceivers
XPADVDD
–0.3 to 1.26
V
—
DDR and DDR2 DRAM I/O voltage
GVDD
–0.3 to 2.75
–0.3 to 1.98
V—
PCI, local bus, DUART, system control and power management, I2C,
and JTAG I/O voltage
NVDD/LVDD
–0.3 to 3.6
V
—
eTSEC, USB
LVDDA/LVDDB
–0.3 to 3.6
V
—
Input voltage
DDR DRAM signals
MVIN
–0.3 to (GVDD + 0.3)
V
2, 5
DDR DRAM reference
MVREF
–0.3 to (GVDD + 0.3)
V
2, 5
Enhanced three-speed Ethernet signals
LVIN
–0.3 to (LVDDA + 0.3)
or
–0.3 to (LVDDB + 0.3)
V4, 5
Local bus, DUART, SYS_CLK_IN, system control,
and power management, I2C, and JTAG signals
NVIN
–0.3 to (NVDD + 0.3)
V
3, 5
PCI
NVIN
–0.3 to (NVDD + 0.3)
V
6
Storage temperature range
TSTG
–55 to 150
C—
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and
functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
2. Caution: MVIN must not exceed GVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
power-on reset and power-down sequences.
3. Caution: NVIN must not exceed NVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
power-on reset and power-down sequences.
4. Caution: LVIN must not exceed LVDDA/LVDDB by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
power-on reset and power-down sequences.
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