參數(shù)資料
型號(hào)： MPC8313ECVRAGDB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516
封裝： 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-516
文件頁(yè)數(shù)： 79/100頁(yè)
文件大?。?/td> 1247K
代理商： MPC8313ECVRAGDB
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
8
Freescale Semiconductor
Electrical Characteristics
amount of current listed in the Current Requirement column; this is the maximum current possible. Proper
device operation outside of these conditions is not guaranteed.
Table 2. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value1
1 GV
DD, NVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or negative
direction.
Unit
Current
Requirement
Core supply voltage
VDD
1.0 V ± 50 mV
V
469 mA
Internal core logic constant power
VDDC
1.0 V ± 50 mV
V
377 mA
SerDes internal digital power
XCOREVDD
1.0
V
170 mA
SerDes internal digital ground
XCOREVSS
0.0
V
—
SerDes I/O digital power
XPADVDD
1.0
V
10 mA
SerDes I/O digital ground
XPADVSS
0.0
V
—
SerDes analog power for PLL
SDAVDD
1.0V± 50mV
V
10 mA
SerDes analog ground for PLL
SDAVSS
0.0
V
—
Dedicated 3.3 V analog power for USB PLL
USB_PLL_PWR3
3.3 V ± 300 mV
V
2–3 mA
Dedicated 1.0 V analog power for USB PLL
USB_PLL_PWR1
1.0 V ± 50 mV
V
2–3 mA
Dedicated analog ground for USB PLL
USB_PLL_GND
0.0
V
—
Dedicated USB power for USB
bias circuit
USB_VDDA_BIAS
3.3 V ± 300 mV
V
4–5 mA
Dedicated USB ground for USB bias circuit
USB_VSSA_BIAS
0.0
V
—
Dedicated power for USB transceiver
USB_VDDA
3.3 V ± 300 mV
V
75 mA
Dedicated ground for USB transceiver
USB_VSSA
0.0
V
—
Analog power for e300 core APLL
AVDD1
1.0 V ± 50 mV
V
2–3 mA
Analog power for system APLL
AVDD2
1.0 V ± 50 mV
V
2–3 mA
DDR1 DRAM I/O voltage (333 MHz, 32-bit operation)
GVDD
2.5 V ± 125 mV
V
131 mA
DDR2 DRAM I/O voltage (333 MHz, 32-bit operation)
GVDD
1.8 V ± 80 mV
V
140 mA
Differential reference voltage for DDR controller
MVREF
1/2 DDR supply
(0.49
× GVDD to
0.51
× GVDD)
V—
Standard I/O voltage
NVDD
3.3 V ± 300 mV2
2 Some GPIO pins may operate from a 2.5-V supply when configured for other functions.
V74 mA
eTSEC2 IO supply
LVDDA
2.5 V ± 125 mV/
3.3 V ± 300 mV
V22 mA
eTSEC1/USB DR IO supply
LVDDB
2.5 V ± 125 mV/
3.3 V ± 300 mV
V44 mA
Supply for eLBC IOs
LVDD
3.3 V ± 300 mV
V
16 mA
Analog and digital ground
VSS
0.0
V
—
Junction temperature
TJ
0 to 105
°C—
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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