參數資料
型號： MPC8313ECVRAGDB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516
封裝： 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-516
文件頁數： 9/100頁
文件大?。?/td> 1247K
代理商： MPC8313ECVRAGDB
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
16
Freescale Semiconductor
DDR and DDR2 SDRAM
Table 16 provides the current draw characteristics for MVREF.
6.2
DDR and DDR2 SDRAM AC Electrical Characteristics
This section provides the AC electrical characteristics for the DDR SDRAM interface.
6.2.1
DDR and DDR2 SDRAM Input AC Timing Specifications
Table 17 provides the input AC timing specifications for the DDR2 SDRAM when GVDD(typ) = 1.8 V.
Table 18 provides the input AC timing specifications for the DDR SDRAM when GVDD(typ) = 2.5 V.
Table 19 provides the input AC timing specifications for the DDR2 SDRAM interface.
Table 16. Current Draw Characteristics for MVREF
Parameter/Condition
Symbol
Min
Max
Unit
Note
Current draw for MVREF
IMVREF
—
500
μA1
Note:
1. The voltage regulator for MVREF must be able to supply up to 500 μA current.
Table 17. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface
At recommended operating conditions with GVDD of 1.8 ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
AC input low voltage
VIL
—MVREF – 0.25
V
—
AC input high voltage
VIH
MVREF + 0.25
—
V
—
Table 18. DDR SDRAM Input AC Timing Specifications for 2.5-V Interface
At recommended operating conditions with GVDD of 2.5 ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
AC input low voltage
VIL
—MVREF – 0.31
V
—
AC input high voltage
VIH
MVREF + 0.31
—
V
—
Table 19. DDR and DDR2 SDRAM Input AC Timing Specifications
At recommended operating conditions. with GVDD of 2.5 ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
Controller skew for MDQS—MDQ
tCISKEW
——
ps
1, 2
333 MHz
—
–750
750
—
266 MHz
—
–750
750
—
Notes:
1. tCISKEW represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that
is captured with MDQS[
n]. This should be subtracted from the total timing budget.
2. The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called tDISKEW. This can be
determined by the following equation: tDISKEW = ± (T/4 – abs(tCISKEW)) where T is the clock period and abs(tCISKEW) is the
absolute value of tCISKEW.
相關PDF資料
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MPC8313ZQAGD 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516
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相關代理商/技術參數
參數描述
MPC8313ECVRAGDC 功能描述:微處理器 - MPU 8313 REV2.2 W/ENC EXT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8313ECVRGDD 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8313ECVRGDDA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
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