參數(shù)資料
型號： MPC8555VTAQDX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1000 MHz, RISC PROCESSOR, PBGA783
封裝： 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, LEAD FREE, FLIP CHIP, PLASTIC, BGA-783
文件頁數(shù)： 77/88頁
文件大?。?/td> 1244K
代理商： MPC8555VTAQDX
MPC8555E PowerQUICC III Integrated Communications Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
79
System Design Information
When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals
OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each
other in value. Then, Z0 = (RP + RN)/2.
Figure 50. Driver Impedance Measurement
The value of this resistance and the strength of the driver’s current source can be found by making two
measurements. First, the output voltage is measured while driving logic 1 without an external differential
termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured
while driving logic 1 with an external precision differential termination resistor of value Rterm. The
measured voltage is V2 = 1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm
× (V
1/V2 – 1). The drive current is then Isource =V1/Rsource.
Table 50 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,
nominal OVDD, 105°C.
Table 50. Impedance Characteristics
Impedance
Local Bus, Ethernet,
DUART, Control,
Configuration, Power
Management
PCI
DDR DRAM
Symbol
Unit
RN
43 Target
25 Target
20 Target
Z0
Ω
RP
43 Target
25 Target
20 Target
Z0
Ω
Differential
NA
ZDIFF
Ω
Note: Nominal supply voltages. See Table 1, Tj = 105°C.
OVDD
OGND
RP
RN
Pad
Data
SW1
SW2
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