參數(shù)資料
型號(hào): MPC8560VTAQJC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1000 MHz, RISC PROCESSOR, PBGA783
封裝: 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, LEAD FREE, FLIP CHIP, PLASTIC, BGA-783
文件頁(yè)數(shù): 48/108頁(yè)
文件大?。?/td> 1379K
代理商: MPC8560VTAQJC
MPC8560 Integrated Processor Hardware Specifications, Rev. 4
44
Freescale Semiconductor
CPM
Figure 15 provides the AC test load for the CPM.
Figure 22. CPM AC Test Load
Figure 23 through Figure 28 represent the AC timing from Table 34 and Table 35. Note that although the
specifications generally reference the rising edge of the clock, these AC timing diagrams also apply when
the falling edge is the active edge.
Figure 23 shows the FCC internal clock.
Figure 23. FCC Internal AC Timing Clock Diagram
Table 35. CPM Output AC Timing Specifications 1
Characteristic
Symbol 2
Min
Max
Unit
FCC outputs—internal clock (NMSI) delay
tFIKHOX
15.5
ns
FCC outputs—external clock (NMSI) delay
tFEKHOX
28
ns
SCC/SPI outputs—internal clock (NMSI) delay
tNIKHOX
0.5
10
ns
SCC outputs—external clock (NMSI) delay
tNEKHOX
28
ns
SPI output—external clock (NMSI) delay
tSEKHOX
211
ns
TDM outputs/SI delay
tTDKHOX
2.5
11
ns
Notes:
1.Output specifications are measured from the 50% level of the rising edge of Serial Clock to the 50% level of the
signal. Timings are measured at the pin.
2.The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example,
tFIKHOX symbolizes the FCC inputs internal timing (FI) for the time tFCC memory clock reference (K) goes from the
high state (H) until outputs (O) are invalid (X).
Output
OVDD/2
RL = 50 Ω
Z0 = 50 Ω
FCC Output Signals
(When GFMR TCI = 1)
tFIKHOX
BRG_OUT
tFIIXKH
tFIIVKH
FCC Input Signals
FCC Output Signals
(When GFMR TCI = 0)
tFIKHOX
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