參數(shù)資料
型號(hào)： MPC8569EVTAQLJB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： RISC PROCESSOR, PBGA783
封裝： 29 X 29 MM, 1 MM PITCH, PLASTIC, BGA-783
文件頁數(shù)： 58/126頁
文件大?。?/td> 2847K
代理商： MPC8569EVTAQLJB
Overall DC Electrical Characteristics
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
37
2.1.1.1
Recommended Operating Conditions
The following table provides the recommended operating conditions for this device. Proper device operation outside these
conditions is not guaranteed.
Debug, DMA, DUART, PIC, I2C, JTAG, power management,
QUICC Engine block, eSDHC, GPIO, clocking, SPI, I/O
voltage select and system control I/O voltage
OVDD
–0.3 to 3.63
V
—
Enhanced local bus I/O voltage
BVDD
–0.3 to 3.63
–0.3 to 2.75
–0.3 to 1.98
V—
Input voltage
DDR2/DDR3 DRAM signals
MVIN
–0.3 to (GVDD + 0.3)
V
2, 3
DDR2/DDR3 DRAM reference
MVREF
–0.3 to (GVDD + 0.3)
V
—
Ethernet signals
LVIN
–0.3 to (LVDDn + 0.3)
V
3
Enhanced local bus signals
BVIN
–0.3 to (BVDD + 0.3)
—
3
Debug, DMA, DUART, PIC, I2C,
JTAG, power management,
QUICC Engine block, eSDHC,
GPIO, clocking, SPI, I/O voltage
select and system control I/O
voltage
OVIN
–0.3 to (OVDD + 0.3)
V
3
SerDes signals
XVIN
–0.3 to (XVDD + 0.3)
V
—
Storage junction temperature range
TSTG
–55 to 150
° C—
Notes:
1. Functional and tested operating conditions are given in Table 3. Absolute maximum ratings are stress ratings only, and
functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
2. The –0.3 to 1.98 V range is for DDR2, and the –0.3 to 1.65 V range is for DDR3.
3. Caution: (B,M,L,O,X)VIN must not exceed (B,G,L,O,X)VDD by more than 0.3 V. This limit may be exceeded for a maximum of
20 ms during power-on reset and power-down sequences.
Table 3. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value
Unit
Notes
Core supply voltage
VDD
1.0 V ± 30 mV
1.1 V ± 33 mV
V1
PLL supply voltage
AVDD_CORE,
AVDD_DDR,
AVDD_LBIU,
AVDD_PLAT,
AVDD_QE,
AVDD_SRDS
1.0 V ± 30 mV
1.1 V ± 33 mV
V2
Core power supply for SerDes transceiver
ScoreVDD
1.0 V ± 30 mV
1.1 V ± 33 mV
V1
Table 2. Absolute Maximum Ratings1 (continued)
Characteristic
Symbol
Range
Unit
Notes
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